Schematic Editor

#regulators 'LP2985LV' 'Package_TO_SOT_SMD:SOT-23-5_HandSoldering' ```

==== Viewing the Current Footprint

The Footprint Assignment Tool contains a footprint viewer. Clicking the image:images/icons/icon_footprint_browser_24.png[footprint viewer icon] button in the top toolbar launches the footprint viewer and shows the selected footprint.

image::images/en/footprint_view.png[scaledwidth="90%", alt="Viewing a footprint"]

The top toolbar contains the following commands:

[width="90%", cols="10%,90%"]
|=======================================================================
|image:images/icons/refresh_24.png[]
|Refresh view
|image:images/icons/zoom_in_24.png[]
|Zoom in

|image:images/icons/zoom_out_24.png[]
|Zoom out

|image:images/icons/zoom_fit_in_page_24.png[]
|Zoom to fit drawing in display area

|image:images/icons/shape_3d_24.png[]
|Show 3D viewer
|=======================================================================

The left toolbar contains the following commands:

[width="90%", cols="10%,90%"]
|=======================================================================
|image:images/icons/cursor_24.png[]
|Use the select tool

|image:images/icons/measurement_24.png[]
|Interactively measure between two points

|image:images/icons/grid_24.png[]
|Display grid dots or lines

|image:images/icons/polar_coord_24.png[]
|Switch between polar and cartesian coordinate systems

|image:images/icons/unit_inch_24.png[]
|Use inches

|image:images/icons/unit_mil_24.png[]
|Display coordinates in mils (1/1000 of an inch)

|image:images/icons/unit_mm_24.png[]
|Display coordinates in millimeters

|image:images/icons/cursor_shape_24.png[]
|Toggle display of full-window crosshairs

|image:images/icons/pad_number_24.png[]
|Toggle between drawing pads in sketch or normal mode

|image:images/icons/pad_sketch_24.png[]
|Toggle between drawing pads in normal mode or outline mode

|image:images/icons/text_sketch_24.png[]
|Toggle between drawing text in normal mode or outline mode

|image:images/icons/show_mod_edge_24.png[]
|Toggle between drawing graphic lines in normal mode or outline mode
|=======================================================================

===== Viewing the Current 3D Model
Clicking the image:images/icons/shape_3d_24.png[3D Viewer icon] button opens the footprint in the 3D model viewer.

NOTE: If a 3D model does not exist for the current footprint, only the footprint itself will be shown in the 3D Viewer.

image::images/en/3d_window.png[scaledwidth="90%", alt="3D-Model view"]

The 3D Viewer is described in the xref:../pcbnew/pcbnew_inspecting.adoc#threed-viewer[PCB Editor manual].


:experimental:

[[erc]]
== Verifikasi Desain dengan _Electrical Rules Check_

=== Pengenalan

The Electrical Rules Check (ERC) tool performs an automatic check of your schematic. The ERC checks for any errors in your sheet, such as unconnected pins, unconnected hierarchical symbols, shorted outputs, etc. ERC output is reported as errors or warnings depending on the severity of the issue detected.

Naturally, an automatic check is not infallible, and it is not possible to detect all design errors. Such a check is still very useful, because it allows you to detect many oversights and small errors. All detected issues should be checked and addressed before proceeding.

The quality of the ERC is directly related to the care taken in declaring electrical pin properties during symbol library creation.

image::images/en/dialog_erc.png[alt="ERC dialog", scaledwidth="70%"]

[[how-to-use-erc]]
=== Penggunaan ERC

ERC can be started by clicking on the icon image:images/icons/erc_24.png[ERC icon].

Akan muncul penanda pada elemen skematik yang menyebabkan kesalahan ERC (pin atau label).

[NOTE]
====
* Pada kotak dialog ini, saat Anda melakukan klik pada pesan kesalahan, Anda akan diarahkan ke penanda yang terkait pada skematik.
* Pada skematik, klik-kanan pada penanda untuk mengakses pesan hasil pemeriksaan yang terkait.
====

You can also delete error markers from the dialog and set specific ERC messages to be suppressed by using the right-click context menu.

image::images/erc_ignore_warning.png[alt="Ignore ERC warning", scaledwidth="70%"]

[[example-of-erc]]
=== Contoh ERC

image::images/erc_pointers.png[alt="ERC pointers", scaledwidth="70%"]

Pada gambar di atas, Anda bisa melihat adanya empat kesalahan:

* Dua keluaran telah tersambung secara tidak sengaja (tanda panah warna merah).
* Dua masukan belum tersambung (tanda panah warna hijau).
* Terdapat kesalahan pada _port power_ tersembunyi, dimana tidak ada bendera _power_ (tanda panah warna hijau di atas).

[[displaying-diagnostics]]
=== Menampilkan Hasil Pemeriksaan

Klik-kanan pada penanda kesalahan. Akan muncul menu _pop-up_ untuk mengakses kotak dialog hasil pemeriksaan ERC.

image::images/en/erc_pointers_info.png[alt="ERC pointers info", scaledwidth="70%"]

Klik 'Marker Error Info' untuk menampilkan deskripsi kesalahan.

image::images/erc_pointers_message.png[alt="ERC pointers message", scaledwidth="80%"]

[[power-pins-and-power-flags]]
=== Pin dan Bendera _Power_

It is common to have an error or a warning on power pins, as shown in the example above, even though all seems normal. This happens in designs where the power is provided through connectors or other components that are not marked as power sources (unlike a regulator output, which is represented by a Power Out pin). Therefore ERC won't detect any Power Out pin connected to the net and will determine it is not driven by a power source.

To avoid this warning, connect the net to `PWR_FLAG` symbol on such a power net as shown in the following example. The `PWR_FLAG` symbol is found in the `power` symbol library. Alternatively, connect any power output pin to the net; `PWR_FLAG` is simply a symbol with a single power output pin.

image::images/eeschema_power_pins_and_flags.png[alt="Power pins and flags", scaledwidth="70%"]

Penanda kesalahan akan menghilang.

Ground nets often need a `PWR_FLAG` as well, because voltage regulators have outputs declared as power outputs, but their ground pins are typically marked as power inputs. Therefore grounds can appear unconnected to a source unless a `PWR_FLAG` symbol is used.

[[configuration]]
=== Konfigurasi

The _Pin Conflicts Map_ panel in Schematic Setup allows you to configure connectivity rules to define electrical conditions for errors and warnings based on what types of pins are connected to each other

image::images/eeschema_erc_options.png[alt="Schematic ERC Pin Conflicts Map", scaledwidth="70%"]

Aturan dapat diubah dengan melakukan klik pada kotak yang diinginkan pada matriks. Pilihan yang tersedia adalah 'normal', 'warning', dan 'error'.

image::images/eeschema_erc_severity.png[alt="Schematic ERC severity settings", scaledwidth="70%"]
The _Violation Severity_ panel in Schematic Setup lets you configure what types of ERC messages should be reported as Errors, Warnings or ignored.

[[erc-report-file]]
=== Berkas Laporan ERC

Berkas laporan ERC dapat dibuat dan disimpan dengan memilih opsi 'Write ERC report'. Ekstensi berkas untuk laporan ERC adalah `.erc`. Berikut adalah contoh dari berkas laporan ERC.

----------------------------------------------------------------------
ERC control (4/1/1997-14:16:4)

***** Sheet 1 (INTERFACE UNIVERSAL)
ERC: Warning Pin input Unconnected @ 8.450, 2.350
ERC: Warning passive Pin Unconnected @ 8.450, 1.950
ERC: Warning: BiDir Pin connected to power Pin (Net 6) @ 10.100, 3.300
ERC: Warning: Power Pin connected to BiDir Pin (Net 6) @ 4.950, 1.400

>> Errors ERC: 4
----------------------------------------------------------------------

:experimental:

[[schematic-to-pcb]]
== Transfer Schematic to PCB

=== Gambaran Umum
Use the Update PCB from Schematic tool to sync design information from the Schematic Editor to the Board Editor. The tool can be accessed with **Tools** -> **Update PCB from Schematic** (kbd:[F8]) in both the schematic and board editors. You can also use the image:images/icons/update_pcb_from_sch_24.png[Update PCB from Schematic icon] icon in the top toolbar of the Board Editor.

NOTE: Update PCB from Schematic is the preferred way to transfer design information from the schematic to the PCB. In older versions of KiCad, the equivalent process was to export a netlist from the Schematic Editor and import it into the Board Editor. It is no longer necessary to use a netlist file.

image::images/update_pcb_from_schematic.png[alt="Update PCB from schematic", scaledwidth="70%"]

The tool adds the footprint for each symbol to the board and transfers updated schematic information to the board. In particular, the board's net connections are updated to match the schematic.

The changes that will be made to the PCB are listed in the _Changes To Be Applied_ pane. The PCB is not modified until you click the **Update PCB** button.

You can show or hide different types of messages using the checkboxes at the bottom of the window. A report of the changes can be saved to a file using the **Save...** button.

=== Options

The tool has several options to control its behavior.

[cols="1,2"]
|===
| Option | Description

| Re-link footprints to schematic symbols based on their reference designators
| Footprints are normally linked to schematic symbols via a unique identifier
created when the symbol is added to the schematic. A symbol's unique identifier
cannot be changed.

If checked, each footprint in the PCB will be re-linked to the symbol that has
the same reference designator as the footprint.

If unchecked, footprints and symbols will be linked by unique identifier as
usual, rather than by reference designator. Each footprint's reference
designator will be updated to match the reference designator of its linked
symbol.

This option should generally be left unchecked. It is useful for specific
workflows that rely on changing the links between schematic symbols and
footprints, such as refactoring a schematic for easier layout or replicating
layout between identical channels of a design.

| Delete footprints with no symbols
| If checked, any footprint in the PCB without a corresponding symbol in the
schematic will be deleted from the PCB. Footprints with the "Not in schematic"
attribute will be unaffected.

If unchecked, footprints without a corresponding symbol will not be deleted.

| Replace footprints with those specified in the schematic
| If checked, footprints in the PCB will be replaced with the footprint that is
specified in the corresponding schematic symbol.

If unchecked, footprints that are already in the PCB will not be changed, even
if the schematic symbol is updated to specify a different footprint.
|===

:experimental:

[[plot-and-print]]
== _Plot_ dan Cetak

=== Pengenalan

Anda bisa mengakses perintah cetak dan _plot_ melalui menu 'File'.

image::images/eeschema_file_menu_plot.png[alt="eeschema_file_menu_plot_png", scaledwidth="60%"]

The supported output formats are Postscript, PDF, SVG, DXF and HPGL. You can also directly print to your printer.

[[common-printing-commands]]
=== Perintah Pencetak Umum

'Plot Current Page':: Mencetak hanya satu berkas untuk lembar kerja yang saat ini dibuka.

'Plot All Pages':: Mencetak _plot_ untuk keseluruhan hirarki (akan dibuat satu berkas cetak untuk setiap lembar kerja).

[[plot-in-postscript]]
=== _Plot_ dalam Format Postscript

Perintah berikut akan menghasilkan berkas PostScript.

image::images/eeschema_plot_postscript.png[alt="eeschema_plot_postscript_png", scaledwidth="70%"]

Nama berkas yang dihasilkan akan menggunakan nama lembar kerja dengan ekstensi `.ps`. Anda bisa menonaktifkan opsi "'Plot border and title block'". Hal ini berguna jika Anda ingin membuat sebuah berkas Postscript sebagai enkapsulasi (format `.eps`) yang kadang digunakan untuk memasukkan sebuah diagram ke dalam perangkat lunak pengolah kata. Kotak 'Messages' akan menampilkan nama berkas yang berhasil dibuat.

[[plot-in-pdf]]
=== _Plot_ dalam Format PDF

image::images/eeschema_plot_pdf.png[alt="eeschema_plot_pdf.png", scaledwidth="70%"]

Anda bisa membuat berkas _plot_ menggunakan format PDF. Nama berkas yang dihasilkan akan menggunakan nama lembar kerja, dengan ekstensi `.pdf`.

[[plot-in-svg]]
=== _Plot_ dalam Format SVG

image::images/eeschema_plot_svg.png[alt="eeschema_plot_svg_png", scaledwidth="70%"]

Anda bisa membuat berkas _plot_ menggunakan format vektor SVG. Nama berkas yang dihasilkan akan menggunakan nama lembar kerja, dengan ekstensi `.svg`.

[[plot-in-dxf]]
=== _Plot_ dalam Format DXF

image::images/eeschema_plot_dxf.png[alt="eeschema_plot_dxf_png", scaledwidth="70%"]

Anda bisa membuat berkas _plot_ menggunakan format DXF. Nama berkas yang dihasilkan akan menggunakan nama lembar kerja dengan ekstensi `.dxf`.

[[plot-in-hpgl]]
=== _Plot_ dalam Format HPGL

Perintah ini akan menghasilkan sebuah berkas HPGL. Dalam format ini, Anda dapat menentukan:

* Ukuran halaman.
* Pangkal halaman (_origin_).
* Lebar pena (dalam mm).

Berikut tampilan kotak dialog pengaturan _plotter_:

image::images/eeschema_plot_hpgl.png[alt="eeschema_plot_hpgl_png", scaledwidth="70%"]

Nama berkas yang dihasilkan akan menggunakan nama lembar kerja dengan ekstensi `.plt`.

[[sheet-size-selection]]
==== Pemilihan Ukuran Lembar Kerja

Umumnya, ukuran halaman akan menyesuaikan ukuran lembar kerja. Pada kasus ini, akan digunakan ukuran lembar kerja yang dipilih pada pengaturan blok judul, dan skala yang dipilih adalah 1. Jika dipilih ukuran lembar kerja yang lain (A4 dengan A0, atau A dengan E), maka skala akan diatur secara otomatis untuk mengisi halaman.

[[offset-adjustments]]
==== Pengaturan _Offset_

Untuk semua ukuran standar, Anda dapat mengatur _offset_ untuk memposisikan gambar seakurat mungkin di posisi tengah. Karena mesin _plotter_ memiliki titik pangkal (_origin_) di tengah atau di sudut kiri bawah lembar kerja, kita perlu mengatur _offset_ agar hasil _plot_ sesuai keinginan kita.

Secara umum:

* Untuk mesin _plotter_ yang memiliki titik pangkal di tengah lembar kerja, maka _offset_ harus bernilai negatif dan diatur setengah dari ukuran lembar kerja.
* Untuk mesin _plotter_ yang memiliki titik pangkal di sudut kiri bawah lembar kerja, maka _offset_ harus bernilai 0.

Untuk mengatur _offset_:

* Pilih ukuran lembar kerja.
* Atur _offset_ X dan _offset_ Y.
* Klik untuk menerapkan pengaturan.

[[print-on-paper]]
=== Mencetak di Kertas

This command, available via the icon image:images/icons/print_button_24.png[Print icon], allows you to visualize and generate design files for the standard printer.

image::images/print_dialog.png[alt="print_dialog_png", scaledwidth="50%"]

Opsi "'Print sheet reference and title block'" akan mengaktifkan atau menonaktifkan referensi lembar kerja dan blok judul.

Opsi "'Print in black and white'" akan mengatur hasil cetak dengan warna monokrom. Opsi ini diperlukan jika Anda menggunakan mesin cetak laser hitam putih, karena warna selain itu akan dicetak secara buram atau abu-abu, sehingga terkadang sulit dibaca.

:experimental:

[[symbol-editor]]
== Symbol Editor

[[general-information-about-symbol-libraries]]
=== Informasi Umum

A symbol is a schematic element which contains a graphical representation, electrical connections, and text fields describing the symbol. Symbols used in a schematic are stored in symbol libraries. KiCad provides a symbol editing tool that allows you to create libraries, add, delete or transfer symbols between libraries, export symbols to files, and import symbols from files. The symbol editing tool provides a simple way to manage symbols and symbol libraries.

[[symbol-library-overview]]
=== Tentang Pustaka Simbol

Suatu pustaka simbol memiliki satu atau lebih simbol. Secara umum, simbol dikelompokkan berdasarkan fungsi, jenis, dan/atau manufaktur.

Sebuah simbol terdiri dari:

* Graphical items (lines, circles, arcs, text, etc.) that determine how symbol looks in a schematic.
* Pins which have both graphic properties (line, clock, inverted, low level active, etc.) and electrical properties (input, output, bidirectional, etc.) used by the Electrical Rules Check (ERC) tool.
* Atribut-atribut seperti referensi, nilai, nama _footprint_ yang terkait untuk desain PCB, dsb.

Symbols can be derived from another symbol in the same library. Derived symbols share the base symbol's graphical shape and pin definitions, but can override the base symbol's property fields (value, footprint, footprint filters, datasheet, description, etc.). Derived symbols can be used to define symbols that are similar to a base part. For example, 74LS00, 74HC00, and 7437 symbols could all be derived from a 7400 symbol. In previous versions of KiCad, derived symbols were referred to as aliases.

Desain simbol yang baik memerlukan hal-hal sebagai berikut:

* Menentukan apakah simbol perlu dibuat dalam bentuk lebih dari satu bagian.
* Defining if the symbol has an alternate body style (also known as a De Morgan representation).
* Membuat desain representasi simbolis menggunakan garis, persegi, lingkaran, poligon, dan teks.
* Menambahkan pin dengan mendefinisikan secara teliti setiap elemen grafis pin, nama, penomoran, dan properti elektrikal (_input_, _output_, _tri-state_, _power port_, dsb).
* Determining if the symbol should be derived from another symbol with the same graphical design and pin definition.
* Menambahkan atribut opsional seperti nama _footprint_ yang digunakan oleh perangkat lunak desain PCB, dan/atau menentukan bagian-bagian yang perlu ditampilkan.
* Mendokumentasikan simbol dengan menambahkan deskripsi dan tautan ke lembar data, dsb.
* Menyimpan ke dalam pustaka yang diinginkan.

[[symbol-library-editor-overview]]
=== Tentang Editor Pustaka Simbol

Tampilan jendela utama editor pustaka simbol ditunjukkan pada gambar di bawah ini. Editor ini terdiri dari tiga bilah alat yang digunakan untuk mengakses secara cepat fitur-fitur umum, dan satu area untuk melihat/mengedit simbol. Tidak semua perintah tersedia pada bilah alat, namun dapat diakses melalui menu.

image::images/libedit_main_window.png[alt="Symbol Editor main window", scaledwidth="95%"]

[[main-toolbar]]
==== Bilah Alat Utama

The main tool bar is located at the top of the main window. It consists of the undo/redo commands, zoom commands, symbol properties dialogs, and unit/representation management controls.

image::images/toolbar_libedit.png[alt="Symbol Editor toolbar", scaledwidth="95%"]

[width="100%", cols="20%,80%"]
|=======================================================================
|image:images/icons/new_component_24.png[New symbol icon]
|Create a new symbol in the selected library.

|image:images/icons/save_24.png[Save icon]
|Save the currently selected library. All modified symbols in the library will
be saved.

|image:images/icons/undo_24.png[Undo icon]
|Undo last edit.

|image:images/icons/redo_24.png[Redo icon]
|Redo last undo.

|image:images/icons/refresh_24.png[Refresh icon]|Refresh display.

|image:images/icons/zoom_in_24.png[Zoom in icon]|Zoom in.

|image:images/icons/zoom_out_24.png[Zoom out icon]|Zoom out.

|image:images/icons/zoom_fit_in_page_24.png[Zoom to fit page icon]|Zoom to fit symbol in display.

|image:images/icons/zoom_selection_24.png[Zoom to selection icon]|Zoom to fit selection.

|image:images/icons/rotate_ccw_24.png[Rotate counterclockwise icon]|Rotate counter-clockwise.

|image:images/icons/rotate_cw_24.png[Rotate clockwise icon]|Rotate clockwise.

|image:images/icons/mirror_h_24.png[Mirror horizontally icon]|Mirror horizontally.

|image:images/icons/mirror_v_24.png[Mirror vertically icon]|Mirror vertically.

|image:images/icons/part_properties_24.png[Symbol properties icon]
|Edit the current symbol properties.

|image:images/icons/pin_table_24.png[Pin table icon]
|Edit the symbol's pins in a tablular interface.

|image:images/icons/datasheet_24.png[Datasheet icon]
|Open the symbol's datasheet. The button will be disabled if no datasheet is
defined for the current symbol.

|image:images/icons/erc_24.png[ERC icon]
|Test the current symbol for design errors.

|image:images/icons/morgan1_24.png[Normal body style icon]
|Select the normal body style. The button is disabled if the current
symbol does not have an alternate body style.

|image:images/icons/morgan2_24.png[Alternate body style icon]
|Select the alternate body style. The button is disabled if the current
symbol does not have an alternate body style.

|image:images/toolbar_libedit_part.png[alt="Unit dropdown",width="80%"]
|Select the unit to display. The drop down control will be disabled if
the current symbol is not derived from a symbol with multiple units.

|image:images/icons/pin2pin_24.png[Synchronized pin edit mode icon]
|Enable synchronized pins edit mode. When this mode is enabled, any pin
modifications are propagated to all other symbol units. Pin number changes are
not propagated. This mode is automatically enabled for symbols with multiple
interchangeable units and cannot be enabled for symbols with only one unit.

|image:images/icons/add_symbol_to_schematic_24.png[Add symbol to schematic icon]
Insert current symbol into schematic.

|=======================================================================

[[element-toolbar]]
==== Bilah Alat Elemen

The vertical toolbar located on the right hand side of the main window allows you to place all of the elements required to design a symbol.

[width="100%", cols="10%,90%"]
|=======================================================================
|image:images/icons/cursor_24.png[Cursor icon]
|Select tool. Right-clicking with the select tool opens the context menu
for the object under the cursor. Left-clicking with the select tool
displays the attributes of the object under the cursor in the message
panel at the bottom of the main window. Double-left-clicking with the
select tool will open the properties dialog for the object under the
cursor.

|image:images/icons/pin_24.png[Pin icon]
|Pin tool. Left-click to add a new pin.

|image:images/icons/text_24.png[Text icon]
|Graphical text tool. Left-click to add a new graphical text item.

|image:images/icons/add_rectangle_24.png[Add rectangle icon]
|Rectangle tool. Left-click to begin drawing the first corner of a
graphical rectangle. Left-click again to place the opposite corner of
the rectangle.

|image:images/icons/add_circle_24.png[Add circle icon]
|Circle tool. Left-click to begin drawing a new graphical circle from
the center. Left-click again to define the radius of the circle.

|image:images/icons/add_arc_24.png[Add arc icon]
|Arc tool. Left-click to begin drawing a new graphical arc item from the
first arc end point. Left-click again to define the second arc end point.
Adjust the radius by dragging the arc center point.

|image:images/icons/add_line_24.png[Add line icon]
|Connected line tool. Left-click to begin drawing a new graphical line item
in the current symbol. Left-click for each additional connected line.
Double-left-click to complete the line.

|image:images/icons/anchor_24.png[Anchor icon]
|Anchor tool. Left-click to set the anchor position of the symbol.

|image:images/icons/delete_cursor_24.png[Delete icon]
|Delete tool. Left-click to delete an object from the current symbol.
|=======================================================================

[[options-toolbar]]
==== Bilah Alat Opsi

The vertical tool bar located on the left hand side of the main window allows you to set some of the editor drawing options.

[width="100%", cols="10%,90%"]
|=======================================================================
|image:images/icons/grid_24.png[Grid icon]
|Toggle grid visibility on and off.

|image:images/icons/unit_inch_24.png[Inch unit icon]
|Set units to inches.

|image:images/icons/unit_mil_24.png[Millimeter unit icon]
|Set units to mils (0.001 inch).

|image:images/icons/unit_mm_24.png[Millimeter unit icon]
|Set units to millimeters.

|image:images/icons/cursor_shape_24.png[Cursor shape icon]
|Toggle full screen cursor on and off.

|image:images/icons/pin_show_etype_24.png[Show pintype icon]
|Toggle display of pin electrical types.

|image:images/icons/search_tree_24.png[Symbol tree icon]
|Toggle display of libraries and symbols.
|=======================================================================

[[library-selection-and-maintenance]]
=== Pemilihan dan Pemeliharaan Pustaka

The selection of the current library is possible via the image:images/icons/search_tree_24.png[Symbol tree icon] icon which shows you all available libraries and allows you to select one. When a symbol is loaded or saved, it will be put in this library. The library name of a symbol is the contents of its `Value` field.

[[select-and-save-a-symbol]]
==== Memilih dan Menyimpan Simbol

[[symbol-selection]]
===== Pemilihan Simbol

Clicking the image:images/icons/search_tree_24.png[Symbol tree icon] icon on the left tool bar toggles the treeview of libraries and symbols. Clicking on a symbol opens that symbol.

[NOTE]
Some symbols are derived from other symbols. Derived symbol names are displayed in __italics__ in the treeview. If a derived symbol is opened, its symbol graphics will not be editable. Its symbol fields will be editable as normal. To edit the graphics of a base symbol and all of its derived symbols, open the base symbol.

[[save-a-symbol]]
===== Menyimpan Simbol

After modification, a symbol can be saved in the current library or a different library.

To save the modified symbol in the current library, click the image:images/icons/save_24.png[Save icon] icon. The modifications will be written to the existing symbol.

NOTE: Saving a modified symbol also saves all other modified symbols in the same library.

To save the symbol changes to a new symbol, click **File** -> **Save As...**. The symbol can be saved in the current library or a different library. A new name can be set for the symbol.

To create a new file containing only the current symbol, click **File** -> **Export** -> **Symbol...**. This file will be a standard library file which will contain only one symbol.

[[creating-library-symbols]]
=== Membuat Simbol Pustaka

[[create-a-new-symbol]]
==== Membuat Simbol Baru

A new symbol can be created by clicking the image:images/icons/new_component_24.png[New symbol icon] icon. You will be asked for a number of symbol properties.

* A symbol name (this name is used as the default value for the `Value` field in the schematic editor)
* An optional base symbol to derive the new symbol from. The new symbol will use the base symbol's graphical shape and pin configuration, but other symbol information can be modified in the derived symbol. The base symbol must be in the same library as the new derived symbol.
* The reference designator prefix (`U`, `C`, `R`...).
* The number of units per package, and whether those units are interchangeable (for example a 7400 is made of 4 units per package).
* If an alternate body style (sometimes referred to as a "De Morgan equivalent") is desired.
* Whether the symbol is a power symbol. Power symbols appear in the "Add Power Port" dialog in the Schematic editor, their `Value` fields are not editable in the schematic, they cannot be assigned a footprint and they are not added to the PCB, and they are not included in the bill of materials.
* Whether the symbol should be excluded from the bill of materials.
* Whether the symbol should be excluded from the PCB.

There are also several graphical options.

* The offset between the end of each pin and its pin name.
* Whether the pin number and pin name should be displayed.
* Whether the pin names should be displayed alongside the pins or at the ends of the pins inside the symbol body.

These properties can also be changed later in the <<symbol-properties, Symbol Properties window>>.

image::images/eeschema_new_symbol_properties.png[alt="New symbol properties", scaledwidth="50%"]

Simbol yang baru akan dibuat menggunakan properti di atas, dan akan muncul pada layar editor seperti gambar di bawah ini.

image::images/eeschema_libedit_new.png[alt="Newly created symbol", scaledwidth="95%"]

The blue cross in the center is the symbol anchor, which specifies the symbol origin i.e. the coordinates (0, 0). The anchor can be repositioned by selecting the image:images/icons/anchor_24.png[Anchor icon] icon and clicking on the new desired anchor position.

[[create-a-symbol-from-another-symbol]]
==== Membuat Simbol dari Simbol yang Lain

Terkadang, simbol yang ingin Anda buat berbentuk mirip dengan simbol yang sudah ada di pustaka. Anda dapat memuat dan memodifikasi simbol yang sudah ada dengan mudah.

* Muat simbol yang akan digunakan sebagai titik mulai.
* Save a new copy of the symbol using **File** -> **Save As...**. The Save As dialog will prompt for a name for the new symbol and the library to save it in.
* Edit simbol baru sesuai keinginan Anda.
* Save the modified symbol.

[[symbol-properties]]
==== Properti Simbol

Symbol properties are set when the symbol is created but they can be modified at any point. To change the symbol properties, click on the image:images/icons/part_properties_24.png[Symbol properties icon] icon to show the dialog below.

image::images/eeschema_properties_for_symbol.png[alt="Properti Simbol", scaledwidth="60%"]

It is important to correctly set the number of units per package and the alternate symbolic representation, if enabled, because when pins are edited or created the corresponding pins for each unit will be affected. If you change the number of units per package after pin creation and editing, there will be additional work to specify the pins and graphics for the new unit. Nevertheless, it is possible to modify these properties at any time.

The graphic options "Show pin number" and "Show pin name" define the visibility of the pin number and pin name text. The option "Place pin names inside" defines the pin name position relative to the pin body. The pin names will be displayed inside the symbol outline if the option is checked. In this case the "Pin Name Position Offset" property defines the shift of the text away from the body end of the pin. A value from 0.02 to 0.05 inches is usually reasonable.

Contoh di bawah ini menampilkan sebuah simbol dengan opsi "'Place pin name inside'" dicentang. Perhatikan posisi dari nama dan nomor pin.

image::images/eeschema_uncheck_pin_name_inside.png[alt="Place pin name inside unchecked", scaledwidth="95%"]

[[symbol-name-description-and-keywords]]
===== Symbol Name, Description, and Keywords

The symbol's name is the same as the `Value` field. When the symbol name is changed the value also changes, and vice versa. The symbol's name in the library also changes accordingly.

The symbol description should contain a brief description of the component, such as the component function, distinguishing features, and package options. The keywords should contain additional terms related to the component. Keywords are used primarily to assist in searching for the symbol.

image::images/eeschema_add_symbol_search_description.png[alt="Searching for a symbol in the add a symbol dialog", scaledwidth="65%"]

A symbol's name, description, and keywords are all used when searching for symbols in the Symbol Editor and Add a Symbol dialog. The description and keywords are displayed in the Symbol Library Browser and Add a Symbol dialog.

[[footprint-filters]]
===== Footprint Filters

The footprint filters tab is used to define which footprints are appropriate to use with the symbol. The filters can be applied in the Footprint Assignment tool so that only appropriate footprints are displayed for each symbol.

Multiple footprint filters can be defined. Footprints that match any of the filters will be displayed; if no filters are defined, then all footprints will be displayed.

Filters can use wildcards: `\*` matches any number of characters, including zero, and `?` matches zero or one characters. For example, `SOIC-*` would match the `SOIC-8_3.9x4.9mm_P1.27mm` footprint as well as any other footprint beginning with `SOIC-`. The filter `SOT?23` matches `SOT23` as well as `SOT-23`.

image::images/eeschema_libedit_footprint.png[alt="Footprint filters", scaledwidth="70%"]

[[symbols-with-alternate-symbolic-representation]]
==== Simbol dengan Representasi Simbolis Alternatif

If the symbol has an alternate body style defined, one body style must be selected for editing at a time. To edit the normal representation, click the image:images/icons/morgan1_24.png[Normal representation icon] icon.

To edit the alternate representation, click on the image:images/icons/morgan2_24.png[Alternate representation icon] icon. Use the image:images/toolbar_libedit_alias.png[images/toolbar_libedit_part.png] dropdown shown below to select the unit you wish to edit.

image::images/eeschema_libedit_select_unit.png[alt="Selecting a symbol unit", scaledwidth="80%"]

[[graphical-elements]]
=== Elemen Grafis

Graphical elements create the visual representation of a symbol and contain no electrical connection information. Graphical elements are created with the following tools:

* Garis dan poligon, didefinisikan oleh titik awal dan titik akhir.
* Persegi, didefinisikan oleh dua sudut diagonal.
* Lingkaran, didefinisikan oleh titik tengah dan radius.
* Busur, didefinisikan oleh titik mulai dan titik akhir busur dan titik tengahnya. Busur bisa memiliki sudut 0° hingga 180°.

Bilah alat vertikal di sebelah kanan jendela utama berguna untuk meletakkan semua elemen grafis yang diperlukan untuk mendesain tampilan sebuah simbol.

[[graphical-element-membership]]
==== Keanggotaan Elemen Grafis

Setiap elemen grafis (garis, busur, lingkaran, dsb) dapat didefinisikan sebagai bentuk umum untuk keseluruhan bagian dan/atau gaya bentuk atau spesifik untuk bagian dan/atau gaya bentuk tertentu. Opsi-opsi elemen dapat diakses dengan klik-kanan pada elemen untuk menampilkan menu konteks elemen yang dipilih. Gambar di bawah menampilkan menu konteks untuk elemen garis.

image::images/eeschema_libedit_context_menu.png[alt="Graphic line context menu", scaledwidth="80%"]

Anda juga bisa melakukan klik-ganda pada sebuah elemen untuk mengubah propertinya. Gambar di bawah menampilkan dialog properti untuk elemen poligon.

image::images/eeschema_libedit_polyline_properties.png[alt="Graphic line properties", scaledwidth="50%"]

Properti dari suatu elemen grafis antara lain:

* "Line width" defines the width of the element's line in the current drawing units.
* "Fill Style" determines if the shape defined by the graphical element is to be drawn unfilled, background filled, or foreground filled.
* "Common to all units in symbol" determines if the graphical element is drawn for each unit in symbol with more than one unit per package or if the graphical element is only drawn for the current unit.
* "Common to all body styles (De Morgan)" determines if the graphical element is drawn for each symbolic representation in symbols with an alternate body style or if the graphical element is only drawn for the current body style.

[[graphical-text-elements]]
==== Elemen Teks Grafis

The image:images/icons/text_24.png[Text icon] icon allows for the creation of graphical text. Graphical text is automatically oriented to be readable, even when the symbol is mirrored. Please note that graphical text items are not the same as symbol fields.

[[multiple-units-per-symbol-and-alternate-body-styles]]
=== Simbol dengan Beberapa Bagian dan Gaya Bentuk Alternatif

Symbols can have up to two body styles (a standard symbol and an alternate symbol often referred to as a "De Morgan equivalent") and/or have more than one unit per package (logic gates for example). Some symbols can have more than one unit per package each with different symbols and pin configurations.

Consider for instance a relay with two switches, which can be designed as a symbol with three different units: a coil, switch 1, and switch 2. Designing a symbol with multiple units per package and/or alternate body styles is very flexible. A pin or a body symbol item can be common to all units or specific to a given unit or they can be common to both symbolic representation so are specific to a given symbol representation.

By default, pins are specific to a unit and body style. When a pin is common to all units or all body styles, it only needs to be created once. This is also the case for the body style graphic shapes and text, which may be common to each unit, but typically are specific to each body style).

[[example-of-a-symbol-with-multiple-noninterchangeable-units]]
==== Example of a Symbol With Multiple Noninterchangeable Units

For an example of a symbol with multiple units that are not interchangeable, consider a relay with 3 units per package: a coil, switch 1, and switch 2.

The three units are not all the same, so "All units are interchangeable" should be deselected in the Symbol Properties dialog. Alternatively, this option could have been specified when the symbol was initially created.

image::images/eeschema_libedit_not_interchangeable.png[alt="Uncheck all units are interchangeable", scaledwidth="60%"]

===== Unit A

image::images/eeschema_libedit_unit1.png[alt="Relay unit A", scaledwidth="45%"]

===== Unit B

image::images/eeschema_libedit_unit2.png[alt="Relay unit B", scaledwidth="45%"]

===== Unit C

image::images/eeschema_libedit_unit3.png[alt="Relay unit C", scaledwidth="45%"]

Unit A does not have the same symbol and pin layout as Units B and C, so the units are not interchangeable.

NOTE: "Synchronized Pins Edit Mode" can be enabled by clicking the image:images/icons/pin2pin_24.png[Synchronized pins edit mode icon] icon. In this mode, pin modifications are propagated between symbol units; changes made in one unit will be reflected in the other units as well. When this mode is disabled, pin changes made in one unit do not affect other units. This mode is enabled automatically when "All units are interchangeable" is checked, but it can be disabled. The mode cannot be enabled when "All units are interchangeable" is unchecked or when the symbol only has one unit.

[[graphical-symbolic-elements]]
===== Elemen Simbolis Grafis

Shown below are properties for a graphic body element. In the relay example above, the three units have different symbolic representations. Therefore, each unit was created separately and the graphical body elements have the "Common to all units in symbol" setting disabled.

image::images/eeschema_libedit_disable_common.png[alt="Disable common to all units in symbol", scaledwidth="70%"]

[[pin-creation-and-editing]]
=== Membuat dan Mengedit Pin

You can click on the image:images/icons/pin_24.png[Pin icon] icon to create and insert a pin. The editing of all pin properties is done by double-clicking on the pin or right-clicking on the pin to open the pin context menu. Pins must be created carefully, because any error will have consequences on the PCB design. Any pin already placed can be edited, deleted, and/or moved.

[[pin-overview]]
==== Tentang Pin

A pin is defined by its graphical representation, its name and its number. The pin's name and number can contain letters, numbers, and symbols, but not spaces. For the Electrical Rules Check (ERC) tool to be useful, the pin's electrical type (input, output, tri-state...) must also be defined correctly. If this type is not defined properly, the schematic ERC check results may be invalid.

Catatan penting:

* Symbol pins are matched to footprint pads by number. The pin number in the symbol must match the corresponding pad number in the footprint.
* Do not use spaces in pin names and numbers. Spaces will be automatically replaced with underscores (`_`).
* To define a pin name with an inverted signal (overline) use the `~` (tilde) character followed by the text to invert in braces. For example `~{FO}O` would display [overline]#FO# O.
* If the pin name is empty, the pin is considered unnamed.
* Pin names can be repeated in a symbol.
* Pin numbers must be unique in a symbol.

[[pin-properties]]
==== Properti Pin

image::images/eeschema_libedit_pin_properties.png[alt="Pin properties", scaledwidth="95%"]

Kotak dialog properti pin digunakan untuk mengedit karakteristik dari sebuah pin. Kotak dialog ini akan muncul secara otomatis ketika Anda membuat sebuah pin atau melakukan klik-ganda pada pin yang sudah ada. Kotak dialog ini dapat digunakan untuk mengubah:

* The pin name and text size.
* The pin number and text size.
* The pin length.
* The pin electrical type and graphical style.
* Keanggotaan pada bagian dan representasi alternatif.
* Pin visibility.
* <<alternate-pin-definitions,Alternate pin definitions>>.

[[pin-graphic-styles]]
==== Pin Graphic Styles

Shown in the figure below are the different pin graphic styles. The choice of graphic style does not have any influence on the pin's electrical type.

image::images/eeschema_libedit_pin_properties_style.png[alt="Pin graphic styles", scaledwidth="95%"]

[[pin-electrical-types]]
==== Tipe Elektrikal Pin

Choosing the correct electrical type is important for the schematic ERC tool. ERC will check that pins are connected appropriately, for example ensuring that input pins are driven and power inputs receive power from an appropriate source.

[width="100%", cols="25%,75%"]
|=======================================================================
| Pin Type | Description
| Input | A pin which is exclusively an input.
| Output | A pin which is exclusively an output.
| Bidirectional | A pin that can be either an input or an output, such as a
microcontroller data bus pin.
| Tri-state | A three state output pin (high, low, or high impedance)
| Passive | A passive symbol pin: resistors, connectors, etc.
| Free | A pin that can be freely connected to any other pin without electrical
concerns.
| Unspecified | A pin for which the ERC check does not matter.
| Power input | A symbol's power pin. As a special case, power input pins that
are marked invisible are automatically connected to the net with the same name.
See the <<creating-power-ports, Power Ports section>> for more information.
| Power output | A pin that provides power to other pins, such as a regulator
output.
| Open collector | An open collector logic output.
| Open emitter | An open emitter logic output.
| Unconnected | A pin that should not be connected to anything.
|=======================================================================

[[pushing-pin-properties-to-other-pins]]
==== Pushing Pin Properties to Other Pins

You can apply the length, name size, or number size of a pin to the other pins in the symbol by right clicking the pin and selecting **Push Pin Length**, **Push Pin Name Size**, or **Push Pin Number Size**, respectively.

image::images/eeschema_libedit_pin_context_menu.png[alt="Pin context menu", scaledwidth="60%"]

[[defining-pins-for-multiple-units-and-alternate-symbolic-representations]]
==== Mendefinisikan Pin untuk Banyak Bagian dan Representasi Simbolis Alternatif

Symbols with multiple units and/or graphical representations are particularly problematic when creating and editing pins. The majority of pins are specific to each symbol unit (because each unit has a different set of pins) and to each body style (because the form and position is different between the normal body style and the alternate form).

The symbol library editor allows the simultaneous creation of pins. By default, changes made to a pin are made for all units of a multiple unit symbol and to both representations for symbols with an alternate symbolic representation. The only exception to this is the pin's graphical type and name, which remain unlinked between symbol units and body styles. This dependency was established to allow for easier pin creation and editing in most cases. This dependency can be disabled by toggling the image:images/icons/pin2pin_24.png[Synchronized pin edit mode icon] icon on the main tool bar. This will allow you to create pins for each unit and representation completely independently.

Pins can be common or specific to different units. Pins can also be common to both symbolic representations or specific to each symbolic representation. When a pin is common to all units, it only has to drawn once. Pins are set as common or specific in the pin properties dialog.

An example is the output pin in the 7400 quad dual input NAND gate. Since there are four units and two symbolic representations, there are eight separate output pins defined in the symbol definition. When creating a new 7400 symbol, unit A of the normal symbolic representation will be shown in the library editor. To edit the pin style in the alternate symbolic representation, it must first be enabled by clicking the image:images/icons/morgan2_24.png[Alternate representation icon] button on the tool bar. To edit the pin number for each unit, select the appropriate unit using the image:images/toolbar_libedit_alias.png[images/toolbar_libedit_alias.png] drop down control.

[[pin-table]]
==== Pin Table

Another way to edit pins is to use the Pin Table, which is accessible via the image:images/icons/pin_table_24.png[Pin table icon] icon. The Pin Table displays all of the pins in the symbol and their properties in a table view, so it is useful for making bulk pin changes.

Any pin property can be edited by clicking on the appropriate cell. Pins can be added and removed with the image:images/icons/small_plus_16.png[Plus icon] and image:images/icons/small_trash_16.png[Trash icon] icons, respectively.

NOTE: Columns of the pin table can be shown or hidden by right-clicking on the header row and checking or unchecking additional columns. Some columns are hidden by default.

The screenshot below shows the pin table for a quad opamp.

image::images/eeschema_libedit_pin_table.png[alt="Pin table", scaledwidth="95%"]

[[alternate-pin-definitions]]
==== Alternate Pin Definitions

Pins can have alternate pin definitions added to them. Alternate pin definitions allow a user to select a different name, electrical type, and graphical style for a pin when the symbol has been placed in the schematic. This can be used for pins that have multiple functions, such as microcontroller pins.

Alternate pin definitions are added in the Pin Properties dialog as shown below. Each alternate definition contains a pin name, electrical type, and graphic style. This microcontroller pin has all of its peripheral functions defined in the symbol as alternate pin names.

image::images/eeschema_libedit_alternate_pin_definitions.png[alt="Alternate pin definitions", scaledwidth="60%"]

Alternate pin definitions are selected in the Schematic Editor once the symbol has been placed in the schematic. The alternate pin is assigned in the Alternate Pin Assignments tab of the Symbol Properties dialog. Alternate definitions are selectable in the dropdown in the Alternate Assignment column.

image::images/eeschema_alternate_pin_assignment_selection.png[alt="Selecting an alternate pin definition", scaledwidth="60%"]

[[symbol-fields]]
=== Atribut-atribut Simbol

All library symbols are defined with four default fields. The reference designator, value, footprint assignment, and datasheet link fields are created whenever a symbol is created or copied. Only the reference designator and value fields are required.

Symbols defined in libraries are typically defined with only these four default fields. Additional fields such as vendor, part number, unit cost, etc. can be added to library symbols but generally this is done in the schematic editor so the additional fields can be applied to all of the symbols in the schematic.

NOTE: A convenient way to create additional empty symbol fields is to use define field name templates. Field name templates define empty fields that are added to each symbol when it is inserted into the schematic. Field name templates can be defined globally (for all schematics) in the Schematic Editor Preferences, or they can be defined locally (specific to each project) in the Schematic Setup dialog.

[[editing-symbol-fields]]
==== Mengedit Atribut Simbol

Untuk mengedit atribut simbol yang sudah ada, klik-kanan pada teks atribut untuk menampilkan menu konteks atribut seperti ditunjukkan pada gambar di bawah ini.

image::images/eeschema_libedit_field_context_menu.png[alt="Symbol field context menu", scaledwidth="35%"]

To add new fields, delete optional fields, or edit existing fields, use the image:images/icons/part_properties_24.png[Component properties icon] icon on the main tool bar to open the <<symbol-properties,Symbol Properties dialog>>.

Fields are text information associated a the symbol. Do not confuse them with text in the graphic representation of a symbol.

Catatan penting:

* Modifying the `Value` field changes the name of the symbol. The symbol's name in the library will change when the symbol is saved.
* The Symbol Properties dialog must be used to edit a field that is empty or has the invisible attribute enabled because such fields cannot be clicked on.
* The footprint is defined as an absolute footprint using the `LIBNAME:FOOTPRINTNAME` format where `LIBNAME` is the name of the footprint library defined in the footprint library table (see the "Footprint Library Table" section in the PCB Editor manual) and `FOOTPRINTNAME` is the name of the footprint in the library `LIBNAME`.

[[creating-power-ports]]
=== Power Ports

Power ports, or power symbols, are conventionally used to label a wire as part of a power net, like `VCC`, `+5V`, or `GND`. In the schematic below, the `+3.3V` and `GND` symbols are power ports. In addition to acting as a visual indicator that a net is a power rail, a power port will determine the name of the net it is attached to. This is true even if there is another net label attached to the net; the net name determined by the power symbol overrides any other net names.

image::images/eeschema_power_port_example.png[alt="Power port example", scaledwidth="60%"]

It may be useful to place power symbols in a dedicated library. KiCad's symbol library places power symbols in the `power` library, and users may create libraries to store their own power symbols. If the "Define as power symbol" box is checked in a symbol's properties, that symbol will appear in the Schematic Editor's "Add Power Port" dialog for convenient access.

Power symbols are handled and created the same way as normal symbols, but there are several additional considerations described below. They consist of a graphical symbol and a pin of the type "Power input" that is marked hidden.

Below is an example of a `GND` power symbol.

image::images/eeschema_libedit_power_symbol.png[alt="Editing a power symbol", scaledwidth="95%"]

==== Creating a Power Port Symbol

Power Port symbols consist of a pin of type "Power input" that is marked invisible. Invisible power input pins have a special property of automatically connecting to a net with the same name as the pin name. A net that is wired to an invisible power input pin will therefore be named after the pin, even if there are other net labels on the net. This connection is global.

NOTE: If the power symbol has the "Define as power symbol" property checked, the power input pin does not need to be marked invisible. However, the convention is to make these pins invisible anyway.

image::images/eeschema_libedit_power_symbol_pin.png[alt="Power symbol pin", scaledwidth="60%"]

Untuk membuat sebuah simbol _power_, lakukan langkah-langkah berikut:

* Add a pin of type "Power input", with "Visible" unchecked, and the pin named according to the desired net. Make the pin number `1`, the length `0`, and set the graphic style to "Line". The pin name establishes the connection to the net; in this case the pin will automatically connect to the net `GND`. The pin number, length, and line style do not matter electrically.
* Place the pin on the symbol anchor.
* Use the shape tools to draw the symbol graphics.
* Set the symbol value. The symbol value does not matter electrically, but it is displayed in the schematic. To eliminate confusion, it should match the pin name (which determines the connected net name).
* Check the "Define as power symbol" box in Symbol Properties window. This makes the symbol appear in the "Add Power Port" dialog, makes the `Value` field read-only in the schematic, prevents the symbol from being assigned a footprint, and excludes the symbol from the board, BOM, and netlists.
* Set the symbol reference and uncheck the "Show" box. The reference text is not important except for the first character, which should be `\#`. For the power port shown above, the reference could be `#GND`. Symbols with references that begin with `#` are not added to the PCB, are not included in Bill of Materials exports or netlists, and they cannot be assigned a footprint in the footprint assignment tool. If a power port's reference does not begin with `#`, the character will be inserted automatically when the annotation or footprint assignment tools are run.

An easier method to create a new power port symbol is to use another symbol as a starting point, <<creating-a-symbol-from-another-symbol,as described earlier>>.

NOTE: When modifying an existing power port symbol, make sure to rename the pin name so that the new symbol connects to the appropriate power net.

:experimental:

[[viewlib]]
== Peramban Pustaka Simbol

=== Pengenalan

The Symbol Library Browser allows you to quickly examine the content of symbol libraries. The Symbol Library Viewer can be accessed by clicking image:images/icons/library_browser_24.png[Library viewer icon] icon on the main toolbar, **View** -> **Symbol Library Browser...**, or clicking **Select With Browser** in the "Choose Symbol" window.

image::images/eeschema_viewlib_choose.png[alt="eeschema_viewlib_choose_png", scaledwidth="60%"]

[[viewlib---main-screen]]
=== Viewlib - Tampilan Utama

image::images/eeschema_viewlib_select_library.png[alt="eeschema_viewlib_select_library_png", scaledwidth="95%"]

Untuk memeriksa isi pustaka, pilih satu pustaka dari daftar pada panel sebelah kiri. Semua simbol pada pustaka yang dipilih akan ditampilkan pada panel kedua. Pilh nama simbol untuk melihat simbol tersebut.

image::images/eeschema_viewlib_select_component.png[alt="eeschema_viewlib_select_component_png", scaledwidth="95%"]

[[viewlib-top-toolbar]]
=== Bilah Alat Atas pada Peramban Pustaka Simbol

Bilah alat atas pada Peramban Pustaka Simbol ditampilkan pada gambar di bawah.

image::images/toolbar_viewlib.png[alt="images/toolbar_viewlib.png", scaledwidth="95%"]

The available commands are:

[width="100%", cols="20%,80%"]
|=======================================================================
|image:images/icons/library_browser_24.png[Symbol selection icon]
|Selection of the symbol which can be also selected in the displayed
list.

|image:images/icons/lib_previous_24.png[Previous symbol icon]
|Display previous symbol.

|image:images/icons/lib_next_24.png[Next symbol icon]
|Display next symbol.

|image:images/icons/refresh_24.png[] image:images/icons/zoom_in_24.png[]
image:images/icons/zoom_out_24.png[] image:images/icons/zoom_fit_in_page_24.png[]
|Zoom tools.

|image:images/icons/morgan1_24.png[] image:images/icons/morgan2_24.png[]
|Selection of the representation (normal or alternate) if an alternate
representation exists.

|image:images/toolbar_viewlib_part.png[alt="images/toolbar_viewlib_part.png",width="70%"]
|Selection of the unit for symbols that contain multiple units.

|image:images/icons/datasheet_24.png[icons/datasheet_png]
|If they exist, display the associated documents.

|image:images/icons/add_symbol_to_schematic_24.png[Add symbol to schematic icon]
|Close the browser and place the selected symbol in the schematic.
|=======================================================================

:experimental:

[[create-a-netlist]]
== Membuat Netlist

=== Gambaran Umum

A netlist is a file which describes electrical connections between symbol pins. These connections are referred to as nets. Netlist files contain:

* A list of symbols and their pins.
* A list of connections (nets) between symbol pins.

Many different netlist formats exist. Sometimes the symbols list and the list of nets are two separate files. This netlist is fundamental in the use of schematic capture software, because the netlist is the link with other electronic CAD software, such as:

* Perangkat lunak pembuat tata letak PCB.
* Simulator skematik dan sinyal elektrikal.
* Programmable logic (FPGA, CPLD, etc.) compilers.

KiCad supports several netlist formats:

* KiCad format, which can be imported by the KiCad PCB Editor. However, the <<eeschema_schematic_to_pcb.adoc#schematic-to-pcb,"Update PCB from Schematic">> tool should be used instead of importing a KiCad netlist into the PCB editor.
* OrCAD PCB2 format, for designing PCBs with OrCAD.
* CADSTAR format, for designing PCBs with CADSTAR.
* Spice format, for use with various external circuit simulators.

NOTE: In KiCad version 5.0 and later, it is not necessary to create a netlist for transferring a design from the schematic editor to the PCB editor. Instead, use the <<eeschema_schematic_to_pcb.adoc#schematic-to-pcb,"Update PCB from Schematic">> tool.

[[netlist-formats]]
=== Format-format Netlist

Netlists are exported with the Export Netlist dialog (**File**->**Export**->**Netlist...**).

Several netlist formats are available, and are selectable with the tabs at the top of the window. Some netlist formats have options.

Clicking the **Export Netlist** button prompts for a netlist filename and saves the netlist.

[NOTE]
Netlist generation can take up to several minutes for large schematics.

Custom generators can be added by clicking the **Add Generator...** button. Custom generators are external tools that are called by KiCad, for example Python scripts or XSLT stylesheets. For more information on custom netlist generators, see <<adding-new-netlist-generators,the section on adding custom netlist generators>>.

==== KiCad Netlist Format

image::images/eeschema_netlist_dialog_kicad.png[alt="KiCad netlist export", scaledwidth="70%"]

The KiCad netlist exporter does not have any options.

NOTE: In KiCad version 5.0 and later, it is not necessary to create a netlist for transferring a design from the schematic editor to the PCB editor. Instead, use the <<eeschema_schematic_to_pcb.adoc#schematic-to-pcb,"Update PCB from Schematic">> tool.

==== OrCAD PCB2 Netlist Format

image::images/eeschema_netlist_dialog_orcad.png[alt="OrCAD netlist export", scaledwidth="70%"]

The OrCAD netlist exporter does not have any options.

==== CADSTAR Netlist Format

image::images/eeschema_netlist_dialog_cadstar.png[alt="CADSTAR netlist export", scaledwidth="70%"]

The CADSTAR netlist exporter does not have any options.

==== Spice Netlist Format

image::images/eeschema_netlist_dialog_spice.png[alt="Spice netlist export", scaledwidth="70%"]

The Spice netlist format offers several options.

When the *Reformat passive symbol values* box is checked, passive symbol values will be adjusted to be compatible with Spice. Specifically:

* `&mu;` and `M` as unit prefixes are replaced with `u` and `Meg`, respectively
* Units are removed (e.g. `4.7k&ohm;` is changed to `4.7k`)
* Values in RKM format are rewritten to be Spice-compatible (e.g. `4u7` is changed to `4.7u`)

The Spice netlist exporter also provides an easy way to simulate the generated netlist with an external simulator. This can be useful for running a simulation without using <<eeschema_simulator.adoc#simulator,KiCad's internal ngspice simulator>>, or for running an ngspice simulation with options that are not supported by KiCad's simulator tool.

Enter the path to the external simulator in the text box, with `%I` representing the generated netlist. Click the **Create Netlist and Run Simulator Command** button to generate the netlist and automatically run the simulator.

NOTE: The default simulator command (`spice "%I"`) must be adjusted to point to a simulator installed on your system.

For more information on the contents of Spice netlists, see the <<spice-netlists,Spice netlist section>>.

[[netlist-examples]]
=== Contoh Netlist

Below is the schematic from the `sallen_key` project included in KiCad's simulation demos.

image::images/eeschema_netlist_schematic.png[alt="sallen_key demo schematic", scaledwidth="95%"]

The KiCad format netlist for this schematic is as follows:

----
(export (version "E")
  (design
    (source "/usr/share/kicad/demos/simulation/sallen_key/sallen_key.kicad_sch")
    (date "Sun 01 May 2022 03:14:05 PM EDT")
    (tool "Eeschema (6.0.4)")
    (sheet (number "1") (name "/") (tstamps "/")
      (title_block
        (title)
        (company)
        (rev)
        (date)
        (source "sallen_key.kicad_sch")
        (comment (number "1") (value ""))
        (comment (number "2") (value ""))
        (comment (number "3") (value ""))
        (comment (number "4") (value ""))
        (comment (number "5") (value ""))
        (comment (number "6") (value ""))
        (comment (number "7") (value ""))
        (comment (number "8") (value ""))
        (comment (number "9") (value "")))))
  (components
    (comp (ref "C1")
      (value "100n")
      (libsource (lib "sallen_key_schlib") (part "C") (description ""))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-00005789077d"))
    (comp (ref "C2")
      (value "100n")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "SpiceMapping") "1 2")
        (field (name "Spice_Primitive") "C"))
      (libsource (lib "sallen_key_schlib") (part "C") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "Spice_Primitive") (value "C"))
      (property (name "SpiceMapping") (value "1 2"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-00005789085b"))
    (comp (ref "R1")
      (value "1k")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "SpiceMapping") "1 2")
        (field (name "Spice_Primitive") "R"))
      (libsource (lib "sallen_key_schlib") (part "R") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "SpiceMapping") (value "1 2"))
      (property (name "Spice_Primitive") (value "R"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-0000578906ff"))
    (comp (ref "R2")
      (value "1k")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "SpiceMapping") "1 2")
        (field (name "Spice_Primitive") "R"))
      (libsource (lib "sallen_key_schlib") (part "R") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "SpiceMapping") (value "1 2"))
      (property (name "Spice_Primitive") (value "R"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-000057890691"))
    (comp (ref "U1")
      (value "AD8051")
      (fields
        (field (name "Spice_Lib_File") "ad8051.lib")
        (field (name "Spice_Model") "AD8051")
        (field (name "Spice_Netlist_Enabled") "Y")
        (field (name "Spice_Primitive") "X"))
      (libsource (lib "sallen_key_schlib") (part "Generic_Opamp") (description ""))
      (property (name "Spice_Primitive") (value "X"))
      (property (name "Spice_Model") (value "AD8051"))
      (property (name "Spice_Lib_File") (value "ad8051.lib"))
      (property (name "Spice_Netlist_Enabled") (value "Y"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-00005788ff9f"))
    (comp (ref "V1")
      (value "AC 1")
      (libsource (lib "sallen_key_schlib") (part "VSOURCE") (description ""))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-000057336052"))
    (comp (ref "V2")
      (value "DC 10")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "Spice_Node_Sequence") "1 2")
        (field (name "Spice_Primitive") "V"))
      (libsource (lib "sallen_key_schlib") (part "VSOURCE") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "Spice_Primitive") (value "V"))
      (property (name "Spice_Node_Sequence") (value "1 2"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-0000578900ba"))
    (comp (ref "V3")
      (value "DC 10")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "Spice_Node_Sequence") "1 2")
        (field (name "Spice_Primitive") "V"))
      (libsource (lib "sallen_key_schlib") (part "VSOURCE") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "Spice_Primitive") (value "V"))
      (property (name "Spice_Node_Sequence") (value "1 2"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-000057890232")))
  (libparts
    (libpart (lib "sallen_key_schlib") (part "C")
      (footprints
        (fp "C?")
        (fp "C_????_*")
        (fp "C_????")
        (fp "SMD*_c")
        (fp "Capacitor*"))
      (fields
        (field (name "Reference") "C")
        (field (name "Value") "C"))
      (pins
        (pin (num "1") (name "") (type "passive"))
        (pin (num "2") (name "") (type "passive"))))
    (libpart (lib "sallen_key_schlib") (part "Generic_Opamp")
      (fields
        (field (name "Reference") "U")
        (field (name "Value") "Generic_Opamp"))
      (pins
        (pin (num "1") (name "+") (type "input"))
        (pin (num "2") (name "-") (type "input"))
        (pin (num "3") (name "V+") (type "power_in"))
        (pin (num "4") (name "V-") (type "power_in"))
        (pin (num "5") (name "") (type "output"))))
    (libpart (lib "sallen_key_schlib") (part "R")
      (footprints
        (fp "R_*")
        (fp "Resistor_*"))
      (fields
        (field (name "Reference") "R")
        (field (name "Value") "R"))
      (pins
        (pin (num "1") (name "") (type "passive"))
        (pin (num "2") (name "") (type "passive"))))
    (libpart (lib "sallen_key_schlib") (part "VSOURCE")
      (fields
        (field (name "Reference") "V")
        (field (name "Value") "VSOURCE")
        (field (name "Fieldname") "Value")
        (field (name "Spice_Primitive") "V")
        (field (name "Spice_Node_Sequence") "1 2"))
      (pins
        (pin (num "1") (name "") (type "input"))
        (pin (num "2") (name "") (type "input")))))
  (libraries
    (library (logical "sallen_key_schlib")
      (uri "/usr/share/kicad/demos/simulation/sallen_key/sallen_key_schlib.kicad_sym")))
  (nets
    (net (code "1") (name "/lowpass")
      (node (ref "C1") (pin "1") (pintype "passive"))
      (node (ref "U1") (pin "2") (pinfunction "-") (pintype "input"))
      (node (ref "U1") (pin "5") (pintype "output")))
    (net (code "2") (name "GND")
      (node (ref "C2") (pin "2") (pintype "passive"))
      (node (ref "V1") (pin "2") (pintype "input"))
      (node (ref "V2") (pin "2") (pintype "input"))
      (node (ref "V3") (pin "1") (pintype "input")))
    (net (code "3") (name "Net-(C1-Pad2)")
      (node (ref "C1") (pin "2") (pintype "passive"))
      (node (ref "R1") (pin "1") (pintype "passive"))
      (node (ref "R2") (pin "2") (pintype "passive")))
    (net (code "4") (name "Net-(C2-Pad1)")
      (node (ref "C2") (pin "1") (pintype "passive"))
      (node (ref "R2") (pin "1") (pintype "passive"))
      (node (ref "U1") (pin "1") (pinfunction "+") (pintype "input")))
    (net (code "5") (name "Net-(R1-Pad2)")
      (node (ref "R1") (pin "2") (pintype "passive"))
      (node (ref "V1") (pin "1") (pintype "input")))
    (net (code "6") (name "VDD")
      (node (ref "U1") (pin "3") (pinfunction "V+") (pintype "power_in"))
      (node (ref "V2") (pin "1") (pintype "input")))
    (net (code "7") (name "VSS")
      (node (ref "U1") (pin "4") (pinfunction "V-") (pintype "power_in"))
      (node (ref "V3") (pin "2") (pintype "input")))))
----

In Spice format, the netlist is as follows:

----
.title KiCad schematic
.include "ad8051.lib"
XU1 Net-_C2-Pad1_ /lowpass VDD VSS /lowpass AD8051
C2 Net-_C2-Pad1_ GND 100n
C1 /lowpass Net-_C1-Pad2_ 100n
R2 Net-_C2-Pad1_ Net-_C1-Pad2_ 1k
R1 Net-_C1-Pad2_ Net-_R1-Pad2_ 1k
V1 Net-_R1-Pad2_ GND AC 1
V2 VDD GND DC 10
V3 GND VSS DC 10
.ac dec 10 1 1Meg
.end
----


[[notes-on-netlists]]
=== Catatan Mengenai Netlist

[[netlist-name-precautions]]
==== Penamaan Netlist

Many software tools that use netlists do not accept spaces in component names, pins, nets, or other fields. Avoid using spaces in pins, labels, names, and value fields of components to ensure maximum compatibility.

In the same way, special characters other than letters and numbers can cause problems. Note that this limitation is not related to KiCad, but to the netlist formats that can then become untranslatable by other software that reads those netlist files.

[[spice-netlists]]
==== Spice netlists

Spice simulators expect simulation commands (`.PROBE`, `.AC`, `.TRAN`, etc.) to be included in the netlist.

Any text line included in the schematic diagram starting with a period (`.`) will be included in the netlist. If a text object contains multiple lines, only the lines beginning with a period will be included.

`.include` directives for including model library files are automatically added to the netlist based on the Spice model settings for the symbols in the schematic.

[[other-formats]]
=== Format Lain

KiCad supports custom netlist generators for exporting netlists in other formats. Some examples of netlist generators are given in the <<eeschema_creating_customized_netlists_and_bom_files.adoc#creating-customized-netlists-and-bom-files,custom netlist generators section>>.

A netlist generator is a script or program that converts the intermediate netlist file created by KiCad into the desired netlist format. The intermediate netlist file contains all of the netlist information required to create an arbitrary netlist for the schematic. Python and XSLT are commonly used tools to create custom netlist generators.

[[adding-new-netlist-generators]]
==== Adding new netlist generators

New netlist generators are added by clicking the **Add Generator...** button.

image::images/eeschema_netlist_dialog_add_plugin.png[alt="Custom Netlist Generator", scaledwidth="40%"]

New generators require a name and a command. The name is shown in the tab label, and the command is run whenever the **Export Netlist** button is clicked.

When the netlist is generated, KiCad creates an intermediate XML file which contains all of the netlist information from the schematic. The generator command is then run in order to transform the intermediate netlist into the desired netlist format.

The netlist command must be set up properly so that the netlist generator script takes the intermediate netlist file as input and outputs the desired netlist file. The `%I` argument represents the input intermediate netlist filename and the `%O` argument represents the output netlist filename. The exact netlist command will depend on the generator script used.

[[command-line-format]]
==== Format Baris Perintah

Consider the following example which uses `xsltproc` to generate a netlist in PADS ASC format. `xsltproc` converts the intermediate netlist using the `netlist_form_pads-pcb.asc.xsl` stylesheet to define the output format:

`xsltproc -o %O.net /usr/share/kicad/plugins/netlist_form_pads-pcb.asc.xsl %I`

The purpose of each part of the command is as follows:

[width="100%", cols="58%,42%"]
|=======================================================================
|`xsltproc` |A tool to convert an XML file (the intermediate netlist) according
to an XSLT stylesheet.

|`-o %O.net` |Output filename. `%O` is replaced with the name of the
intermediate netlist file, which is `<schematic name>.xml`. Therefore in this
example the complete output filename is `<schematic name>.xml.net`. An arbitrary
output filename can be specified if desired with `-o <filename>`.

|`/usr/share/kicad/plugins/netlist_form_pads-pcb.asc.xsl` |XSLT stylesheet which
determines how the output is formatted. This particular stylesheet is included
with KiCad, but custom stylesheets can also be created.

|`%I` |Input (intermediate netlist) filename. `%I` is replaced with the name of
the intermediate netlist file, which is `<schematic name>.xml`.
|=======================================================================

For netlist generators that do not use `xsltproc`, the generator command will differ.

[[intermediate-netlist-file-format]]
==== Format Berkas Netlist Antara

See the <<eeschema_creating_customized_netlists_and_bom_files.adoc#creating-customized-netlists-and-bom-files,custom netlist generators section>> for more information about netlist generators, a description of the intermediate netlist format, and some examples of netlist generators.

:experimental:

[[creating-customized-netlists-and-bom-files]]
== Membuat Netlist dan Berkas BOM Kustom

[[intermediate-netlist-file]]
=== Berkas Netlist Antara

BOM files and netlist files can be converted from an Intermediate netlist file created by KiCad.

Berkas ini menggunakan sintaks XML dan disebut sebagai Netlist antara. Netlist antara berisi sejumlah besar data mengenai papan sirkuit Anda. Maka dari itu, berkas ini bisa digunakan pasca-pemrosesan untuk membuat BOM atau berkas laporan lainnya.

Tergantung dari keluarannya (BOM atau Netlist), sejumlah berkas turunan dari Netlist antara akan digunakan pasca-pemrosesan.

[[schematic-sample]]
==== Contoh Skematik

image::images/schematic-sample.png[alt="Contoh Skematik", scaledwidth="95%"]

[[the-intermediate-netlist-file-sample]]
==== Contoh Berkas Netlist Antara

Netlist antara (menggunakan sintaks XML) yang terkait dengan sirkuit di atas ditunjukkan seperti di bawah ini.

-----------------------------------------------------------------
<?xml version="1.0" encoding="utf-8"?>
<export version="D">
  <design>
    <source>F:\kicad_aux\netlist_test\netlist_test.sch</source>
    <date>29/08/2010 20:35:21</date>
    <tool>eeschema (2010-08-28 BZR 2458)-unstable</tool>
  </design>
  <components>
    <comp ref="P1">
      <value>CONN_4</value>
      <libsource lib="conn" part="CONN_4"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2141</tstamp>
    </comp>
    <comp ref="U2">
      <value>74LS74</value>
      <libsource lib="74xx" part="74LS74"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20BA</tstamp>
    </comp>
    <comp ref="U1">
      <value>74LS04</value>
      <libsource lib="74xx" part="74LS04"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20A6</tstamp>
    </comp>
    <comp ref="C1">
      <value>CP</value>
      <libsource lib="device" part="CP"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2094</tstamp>
    </comp>
    <comp ref="R1">
      <value>R</value>
      <libsource lib="device" part="R"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E208A</tstamp>
    </comp>
  </components>
  <libparts>
    <libpart lib="device" part="C">
      <description>Condensateur non polarise</description>
      <footprints>
        <fp>SM*</fp>
        <fp>C?</fp>
        <fp>C1-1</fp>
      </footprints>
      <fields>
        <field name="Reference">C</field>
        <field name="Value">C</field>
      </fields>
      <pins>
        <pin num="1" name="~" type="passive"/>
        <pin num="2" name="~" type="passive"/>
      </pins>
    </libpart>
    <libpart lib="device" part="R">
      <description>Resistance</description>
      <footprints>
        <fp>R?</fp>
        <fp>SM0603</fp>
        <fp>SM0805</fp>
        <fp>R?-*</fp>
        <fp>SM1206</fp>
      </footprints>
      <fields>
        <field name="Reference">R</field>
        <field name="Value">R</field>
      </fields>
      <pins>
        <pin num="1" name="~" type="passive"/>
        <pin num="2" name="~" type="passive"/>
      </pins>
    </libpart>
    <libpart lib="conn" part="CONN_4">
      <description>Symbole general de connecteur</description>
      <fields>
        <field name="Reference">P</field>
        <field name="Value">CONN_4</field>
      </fields>
      <pins>
        <pin num="1" name="P1" type="passive"/>
        <pin num="2" name="P2" type="passive"/>
        <pin num="3" name="P3" type="passive"/>
        <pin num="4" name="P4" type="passive"/>
      </pins>
    </libpart>
    <libpart lib="74xx" part="74LS04">
      <description>Hex Inverseur</description>
      <fields>
        <field name="Reference">U</field>
        <field name="Value">74LS04</field>
      </fields>
      <pins>
        <pin num="1" name="~" type="input"/>
        <pin num="2" name="~" type="output"/>
        <pin num="3" name="~" type="input"/>
        <pin num="4" name="~" type="output"/>
        <pin num="5" name="~" type="input"/>
        <pin num="6" name="~" type="output"/>
        <pin num="7" name="GND" type="power_in"/>
        <pin num="8" name="~" type="output"/>
        <pin num="9" name="~" type="input"/>
        <pin num="10" name="~" type="output"/>
        <pin num="11" name="~" type="input"/>
        <pin num="12" name="~" type="output"/>
        <pin num="13" name="~" type="input"/>
        <pin num="14" name="VCC" type="power_in"/>
      </pins>
    </libpart>
    <libpart lib="74xx" part="74LS74">
      <description>Dual D FlipFlop, Set &amp; Reset</description>
      <docs>74xx/74hc_hct74.pdf</docs>
      <fields>
        <field name="Reference">U</field>
        <field name="Value">74LS74</field>
      </fields>
      <pins>
        <pin num="1" name="Cd" type="input"/>
        <pin num="2" name="D" type="input"/>
        <pin num="3" name="Cp" type="input"/>
        <pin num="4" name="Sd" type="input"/>
        <pin num="5" name="Q" type="output"/>
        <pin num="6" name="~Q" type="output"/>
        <pin num="7" name="GND" type="power_in"/>
        <pin num="8" name="~Q" type="output"/>
        <pin num="9" name="Q" type="output"/>
        <pin num="10" name="Sd" type="input"/>
        <pin num="11" name="Cp" type="input"/>
        <pin num="12" name="D" type="input"/>
        <pin num="13" name="Cd" type="input"/>
        <pin num="14" name="VCC" type="power_in"/>
      </pins>
    </libpart>
  </libparts>
  <libraries>
    <library logical="device">
      <uri>F:\kicad\share\library\device.lib</uri>
    </library>
    <library logical="conn">
      <uri>F:\kicad\share\library\conn.lib</uri>
    </library>
    <library logical="74xx">
      <uri>F:\kicad\share\library\74xx.lib</uri>
    </library>
  </libraries>
  <nets>
    <net code="1" name="GND">
      <node ref="U1" pin="7"/>
      <node ref="C1" pin="2"/>
      <node ref="U2" pin="7"/>
      <node ref="P1" pin="4"/>
    </net>
    <net code="2" name="VCC">
      <node ref="R1" pin="1"/>
      <node ref="U1" pin="14"/>
      <node ref="U2" pin="4"/>
      <node ref="U2" pin="1"/>
      <node ref="U2" pin="14"/>
      <node ref="P1" pin="1"/>
    </net>
    <net code="3" name="">
      <node ref="U2" pin="6"/>
    </net>
    <net code="4" name="">
      <node ref="U1" pin="2"/>
      <node ref="U2" pin="3"/>
    </net>
    <net code="5" name="/SIG_OUT">
      <node ref="P1" pin="2"/>
      <node ref="U2" pin="5"/>
      <node ref="U2" pin="2"/>
    </net>
    <net code="6" name="/CLOCK_IN">
      <node ref="R1" pin="2"/>
      <node ref="C1" pin="1"/>
      <node ref="U1" pin="1"/>
      <node ref="P1" pin="3"/>
    </net>
  </nets>
</export>
-----------------------------------------------------------------

[[conversion-to-a-new-netlist-format]]
=== Konversi ke Format Netlist yang Baru

Dengan menerapkan sebuah penyaring pasca-pemrosesan ke berkas Netlist antara, Anda bisa membuat berkas-berkas Netlist asing, demikian pula berkas-berkas BOM. Karena proses konversi ini adalah transformasi dari teks ke teks, penyaring pasca-pemrosesan dapat dibuat menggunakan Python, XSLT, atau peralatan lainnya yang mampu mengolah masukan XML.

XSLT itself is an XML language very suitable for XML transformations. There is a free program called _xsltproc_ that you can download and install. The xsltproc program can be used to read the Intermediate XML netlist input file, apply a style-sheet to transform the input, and save the results in an output file. Use of xsltproc requires a style-sheet file using XSLT conventions. The full conversion process is handled by KiCad, after it is configured once to run xsltproc in a specific way.

[[xslt-approach]]
=== Pendekatan XSLT

Dokumen yang menjelaskan Transformasi XSL (XSLT) tersedia di alamat berikut:

*http://www.w3.org/TR/xslt*

[[create-a-pads-pcb-netlist-file]]
==== Membuat Berkas Netlist Pads-Pcb

Format pads-pcb terdiri dari dua bagian.

* Daftar _footprint_.

* Daftar _net_ : pengelompokan referensi _pad_ berdasarkan _net_.

Berikut adalah sebuah _stylesheet_ untuk mengkonversi berkas Netlist antara ke format Netlist pads-pcb:

-------------------------------------------------------------------------------
<?xml version="1.0" encoding="ISO-8859-1"?>
<!--XSL style sheet to Eeschema Generic Netlist Format to PADS netlist format
    Copyright (C) 2010, SoftPLC Corporation.
    GPL v2.

    How to use:
        https://lists.launchpad.net/kicad-developers/msg05157.html
-->

<!DOCTYPE xsl:stylesheet [
  <!ENTITY nl  "&#xd;&#xa;"> <!--new line CR, LF -->
]>

<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:output method="text" omit-xml-declaration="yes" indent="no"/>

<xsl:template match="/export">
    <xsl:text>*PADS-PCB*&nl;*PART*&nl;</xsl:text>
    <xsl:apply-templates select="components/comp"/>
    <xsl:text>&nl;*NET*&nl;</xsl:text>
    <xsl:apply-templates select="nets/net"/>
    <xsl:text>*END*&nl;</xsl:text>
</xsl:template>

<!-- for each component -->
<xsl:template match="comp">
    <xsl:text> </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "footprint != '' ">
            <xsl:apply-templates select="footprint"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>unknown</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!-- for each net -->
<xsl:template match="net">
    <!-- nets are output only if there is more than one pin in net -->
    <xsl:if test="count(node)>1">
        <xsl:text>*SIGNAL* </xsl:text>
        <xsl:choose>
            <xsl:when test = "@name != '' ">
                <xsl:value-of select="@name"/>
            </xsl:when>
            <xsl:otherwise>
                <xsl:text>N-</xsl:text>
                <xsl:value-of select="@code"/>
            </xsl:otherwise>
        </xsl:choose>
        <xsl:text>&nl;</xsl:text>
        <xsl:apply-templates select="node"/>
    </xsl:if>
</xsl:template>

<!-- for each node -->
<xsl:template match="node">
    <xsl:text> </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text>.</xsl:text>
    <xsl:value-of select="@pin"/>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

</xsl:stylesheet>
-------------------------------------------------------------------------------

Dan berikut adalah berkas keluaran pads-pcb setelah menjalankan xsltproc:

------------------
*PADS-PCB*
*PART*
P1 unknown
U2 unknown
U1 unknown
C1 unknown
R1 unknown
*NET*
*SIGNAL* GND
U1.7
C1.2
U2.7
P1.4
*SIGNAL* VCC
R1.1
U1.14
U2.4
U2.1
U2.14
P1.1
*SIGNAL* N-4
U1.2
U2.3
*SIGNAL* /SIG_OUT
P1.2
U2.5
U2.2
*SIGNAL* /CLOCK_IN
R1.2
C1.1
U1.1
P1.3

*END*
------------------

Perintah untuk menjalankan konversi ini adalah:

-------------------------------------------
kicad\\bin\\xsltproc.exe -o test.net kicad\\bin\\plugins\\netlist_form_pads-pcb.xsl test.tmp
-------------------------------------------

[[create-a-cadstar-netlist-file]]
==== Membuat Berkas Netlist Cadstar

Format Cadstar terdiri dari dua bagian.

* Daftar _footprint_.

* Daftar _net_ : pengelompokan referensi _pad_ berdasarkan _net_.

Berikut adalah berkas _stylesheet_ untuk menjalankan konversi ini:

-----
<?xml version="1.0" encoding="ISO-8859-1"?>
<!--XSL style sheet to Eeschema Generic Netlist Format to CADSTAR netlist format
    Copyright (C) 2010, Jean-Pierre Charras.
    Copyright (C) 2010, SoftPLC Corporation.
    GPL v2.

<!DOCTYPE xsl:stylesheet [
  <!ENTITY nl  "&#xd;&#xa;"> <!--new line CR, LF -->
]>

<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:output method="text" omit-xml-declaration="yes" indent="no"/>

<!-- Netlist header -->
<xsl:template match="/export">
    <xsl:text>.HEA&nl;</xsl:text>
    <xsl:apply-templates select="design/date"/>  <!-- Generate line .TIM <time> -->
    <xsl:apply-templates select="design/tool"/>  <!-- Generate line .APP <eeschema version> -->
    <xsl:apply-templates select="components/comp"/>  <!-- Generate list of components -->
    <xsl:text>&nl;&nl;</xsl:text>
    <xsl:apply-templates select="nets/net"/>          <!-- Generate list of nets and connections -->
    <xsl:text>&nl;.END&nl;</xsl:text>
</xsl:template>

 <!-- Generate line .TIM 20/08/2010 10:45:33 -->
<xsl:template match="tool">
    <xsl:text>.APP "</xsl:text>
    <xsl:apply-templates/>
    <xsl:text>"&nl;</xsl:text>
</xsl:template>

 <!-- Generate line .APP "eeschema (2010-08-17 BZR 2450)-unstable" -->
<xsl:template match="date">
    <xsl:text>.TIM </xsl:text>
    <xsl:apply-templates/>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!-- for each component -->
<xsl:template match="comp">
    <xsl:text>.ADD_COM </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "value != '' ">
            <xsl:text>"</xsl:text> <xsl:apply-templates select="value"/> <xsl:text>"</xsl:text>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>""</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!-- for each net -->
<xsl:template match="net">
    <!-- nets are output only if there is more than one pin in net -->
    <xsl:if test="count(node)>1">
    <xsl:variable name="netname">
        <xsl:text>"</xsl:text>
        <xsl:choose>
            <xsl:when test = "@name != '' ">
                <xsl:value-of select="@name"/>
            </xsl:when>
            <xsl:otherwise>
                <xsl:text>N-</xsl:text>
                <xsl:value-of select="@code"/>
        </xsl:otherwise>
        </xsl:choose>
        <xsl:text>"&nl;</xsl:text>
        </xsl:variable>
        <xsl:apply-templates select="node" mode="first"/>
        <xsl:value-of select="$netname"/>
        <xsl:apply-templates select="node" mode="others"/>
    </xsl:if>
</xsl:template>

<!-- for each node -->
<xsl:template match="node" mode="first">
    <xsl:if test="position()=1">
       <xsl:text>.ADD_TER </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text>.</xsl:text>
    <xsl:value-of select="@pin"/>
    <xsl:text> </xsl:text>
    </xsl:if>
</xsl:template>

<xsl:template match="node" mode="others">
    <xsl:choose>
        <xsl:when test='position()=1'>
        </xsl:when>
        <xsl:when test='position()=2'>
           <xsl:text>.TER     </xsl:text>
        </xsl:when>
        <xsl:otherwise>
           <xsl:text>         </xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:if test="position()>1">
        <xsl:value-of select="@ref"/>
        <xsl:text>.</xsl:text>
        <xsl:value-of select="@pin"/>
        <xsl:text>&nl;</xsl:text>
    </xsl:if>
</xsl:template>

</xsl:stylesheet>
-----

Berikut adalah berkas keluaran Cadstar.

-----
.HEA
.TIM 21/08/2010 08:12:08
.APP "eeschema (2010-08-09 BZR 2439)-unstable"
.ADD_COM P1 "CONN_4"
.ADD_COM U2 "74LS74"
.ADD_COM U1 "74LS04"
.ADD_COM C1 "CP"
.ADD_COM R1 "R"


.ADD_TER U1.7 "GND"
.TER     C1.2
         U2.7
         P1.4
.ADD_TER R1.1 "VCC"
.TER     U1.14
         U2.4
         U2.1
         U2.14
         P1.1
.ADD_TER U1.2 "N-4"
.TER     U2.3
.ADD_TER P1.2 "/SIG_OUT"
.TER     U2.5
         U2.2
.ADD_TER R1.2 "/CLOCK_IN"
.TER     C1.1
         U1.1
         P1.3

.END
-----

[[create-a-orcadpcb2-netlist-file]]
==== Membuat Berkas Netlist OrcadPCB2

Format ini hanya memiliki satu bagian saja, yaitu daftar _footprint_. Setiap _footprint_ berisi daftar _pad_ dengan referensi ke sebuah _net_.

Berikut adalah _stylesheet_ untuk konversi ini:

-----
<?xml version="1.0" encoding="ISO-8859-1"?>
<!--XSL style sheet to Eeschema Generic Netlist Format to CADSTAR netlist format
    Copyright (C) 2010, SoftPLC Corporation.
    GPL v2.

    How to use:
        https://lists.launchpad.net/kicad-developers/msg05157.html
-->

<!DOCTYPE xsl:stylesheet [
  <!ENTITY nl  "&#xd;&#xa;"> <!--new line CR, LF -->
]>

<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:output method="text" omit-xml-declaration="yes" indent="no"/>

<!--
    Netlist header
    Creates the entire netlist
    (can be seen as equivalent to main function in C
-->
<xsl:template match="/export">
    <xsl:text>( { Eeschema Netlist Version 1.1  </xsl:text>
    <!-- Generate line .TIM <time> -->
<xsl:apply-templates select="design/date"/>
<!-- Generate line eeschema version ... -->
<xsl:apply-templates select="design/tool"/>
<xsl:text>}&nl;</xsl:text>

<!-- Generate the list of components -->
<xsl:apply-templates select="components/comp"/>  <!-- Generate list of components -->

<!-- end of file -->
<xsl:text>)&nl;*&nl;</xsl:text>
</xsl:template>

<!--
    Generate id in header like "eeschema (2010-08-17 BZR 2450)-unstable"
-->
<xsl:template match="tool">
    <xsl:apply-templates/>
</xsl:template>

<!--
    Generate date in header like "20/08/2010 10:45:33"
-->
<xsl:template match="date">
    <xsl:apply-templates/>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!--
    This template read each component
    (path = /export/components/comp)
    creates lines:
     ( 3EBF7DBD $noname U1 74LS125
      ... pin list ...
      )
    and calls "create_pin_list" template to build the pin list
-->
<xsl:template match="comp">
    <xsl:text> ( </xsl:text>
    <xsl:choose>
        <xsl:when test = "tstamp != '' ">
            <xsl:apply-templates select="tstamp"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>00000000</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "footprint != '' ">
            <xsl:apply-templates select="footprint"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>$noname</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text> </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "value != '' ">
            <xsl:apply-templates select="value"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>"~"</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text>&nl;</xsl:text>
    <xsl:call-template name="Search_pin_list" >
        <xsl:with-param name="cmplib_id" select="libsource/@part"/>
        <xsl:with-param name="cmp_ref" select="@ref"/>
    </xsl:call-template>
    <xsl:text> )&nl;</xsl:text>
</xsl:template>

<!--
    This template search for a given lib component description in list
    lib component descriptions are in /export/libparts,
    and each description start at ./libpart
    We search here for the list of pins of the given component
    This template has 2 parameters:
        "cmplib_id" (reference in libparts)
        "cmp_ref"   (schematic reference of the given component)
-->
<xsl:template name="Search_pin_list" >
    <xsl:param name="cmplib_id" select="0" />
    <xsl:param name="cmp_ref" select="0" />
        <xsl:for-each select="/export/libparts/libpart">
            <xsl:if test = "@part = $cmplib_id ">
                <xsl:apply-templates name="build_pin_list" select="pins/pin">
                    <xsl:with-param name="cmp_ref" select="$cmp_ref"/>
                </xsl:apply-templates>
            </xsl:if>
        </xsl:for-each>
</xsl:template>


<!--
    This template writes the pin list of a component
    from the pin list of the library description
    The pin list from library description is something like
          <pins>
            <pin num="1" type="passive"/>
            <pin num="2" type="passive"/>
          </pins>
    Output pin list is ( <pin num> <net name> )
    something like
            ( 1 VCC )
            ( 2 GND )
-->
<xsl:template name="build_pin_list" match="pin">
    <xsl:param name="cmp_ref" select="0" />

    <!-- write pin numner and separator -->
    <xsl:text>  ( </xsl:text>
    <xsl:value-of select="@num"/>
    <xsl:text> </xsl:text>

    <!-- search net name in nets section and write it: -->
    <xsl:variable name="pinNum" select="@num" />
    <xsl:for-each select="/export/nets/net">
        <!-- net name is output only if there is more than one pin in net
             else use "?" as net name, so count items in this net
        -->
        <xsl:variable name="pinCnt" select="count(node)" />
        <xsl:apply-templates name="Search_pin_netname" select="node">
            <xsl:with-param name="cmp_ref" select="$cmp_ref"/>
            <xsl:with-param name="pin_cnt_in_net" select="$pinCnt"/>
            <xsl:with-param name="pin_num"> <xsl:value-of select="$pinNum"/>
            </xsl:with-param>
        </xsl:apply-templates>
    </xsl:for-each>

    <!-- close line -->
    <xsl:text> )&nl;</xsl:text>
</xsl:template>

<!--
    This template writes the pin netname of a given pin of a given component
    from the nets list
    The nets list description is something like
      <nets>
        <net code="1" name="GND">
          <node ref="J1" pin="20"/>
              <node ref="C2" pin="2"/>
        </net>
        <net code="2" name="">
          <node ref="U2" pin="11"/>
        </net>
    </nets>
    This template has 2 parameters:
        "cmp_ref"   (schematic reference of the given component)
        "pin_num"   (pin number)
-->

<xsl:template name="Search_pin_netname" match="node">
    <xsl:param name="cmp_ref" select="0" />
    <xsl:param name="pin_num" select="0" />
    <xsl:param name="pin_cnt_in_net" select="0" />

    <xsl:if test = "@ref = $cmp_ref ">
        <xsl:if test = "@pin = $pin_num">
        <!-- net name is output only if there is more than one pin in net
             else use "?" as net name
        -->
            <xsl:if test = "$pin_cnt_in_net>1">
                <xsl:choose>
                    <!-- if a net has a name, use it,
                        else build a name from its net code
                    -->
                    <xsl:when test = "../@name != '' ">
                        <xsl:value-of select="../@name"/>
                    </xsl:when>
                    <xsl:otherwise>
                        <xsl:text>$N-0</xsl:text><xsl:value-of select="../@code"/>
                    </xsl:otherwise>
                </xsl:choose>
            </xsl:if>
            <xsl:if test = "$pin_cnt_in_net &lt;2">
                <xsl:text>?</xsl:text>
            </xsl:if>
        </xsl:if>
    </xsl:if>

</xsl:template>

</xsl:stylesheet>
-----

Berikut adalah berkas keluaran OrcadPCB2.

-----------------------------------------------------
( { Eeschema Netlist Version 1.1  29/08/2010 21:07:51
eeschema (2010-08-28 BZR 2458)-unstable}
 ( 4C6E2141 $noname P1 CONN_4
  (  1 VCC )
  (  2 /SIG_OUT )
  (  3 /CLOCK_IN )
  (  4 GND )
 )
 ( 4C6E20BA $noname U2 74LS74
  (  1 VCC )
  (  2 /SIG_OUT )
  (  3 N-04 )
  (  4 VCC )
  (  5 /SIG_OUT )
  (  6 ? )
  (  7 GND )
  (  14 VCC )
 )
 ( 4C6E20A6 $noname U1 74LS04
  (  1 /CLOCK_IN )
  (  2 N-04 )
  (  7 GND )
  (  14 VCC )
 )
 ( 4C6E2094 $noname C1 CP
  (  1 /CLOCK_IN )
  (  2 GND )
 )
 ( 4C6E208A $noname R1 R
  (  1 VCC )
  (  2 /CLOCK_IN )
 )
)
*
-----------------------------------------------------

[[eeschema-plugins-interface]]
==== Netlist plugins interface

Intermediate Netlist converters can be automatically launched within the Schematic Editor.

[[init-the-dialog-window-1]]
===== Membuka Kotak Dialog _Plugin_

Kita bisa menambahkan sebuah tab antarmuka _plugin_ Netlist yang baru dengan klik pada tombol 'Add Plugin'

image::images/eeschema_plugin_add_plugin.png[alt="eeschema_plugin_add_plugin_png", scaledwidth="50%"]

Berikut adalah bentuk data konfigurasi untuk tab PadsPcb:

image::images/eeschema_plugin_padspcb.png[alt="eeschema_plugin_padspcb_png", scaledwidth="80%"]

[[plugin-configuration-parameters]]
===== Parameter Konfigurasi _Plugin_

The netlist plug-in configuration dialog requires the following information:

* Judul: misalnya nama dari format Netlist.

* Perintah untuk menjalankan konverter.

Setelah Anda menekan tombol Netlist, akan terjadi hal berikut ini:

1.  KiCad creates an intermediate netlist file *.xml, for instance test.xml.

2.  KiCad runs the plug-in by reading test.xml and creates test.net.

[[generate-netlist-files-with-the-command-line]]
===== Membuat Berkas Netlist dengan Baris Perintah

Diasumsikan kita menggunakan program _xsltproc.exe_ untuk menerapkan _stylesheet_ ke berkas antara, maka _xsltproc.exe_ dieksekusi dengan perintah berikut:

_xsltproc.exe -o <nama berkas keluaran> <nama berkas style-sheet> <berkas XML yang akan dikonversi>_

Berikut baris perintah yang digunakan KiCad di sistem operasi Windows:

_f:/kicad/bin/xsltproc.exe -o "%O" f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"_

Di sistem operasi Linux, baris perintahnya adalah:

_xsltproc -o "%O" /usr/local/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"_

Where _netlist_form_pads-pcb.xsl_ is the style-sheet that you are applying. Do not forget the double quotes around the file names, this allows them to have spaces after the substitution by KiCad.

Baris perintah menerima parameter berikut untuk nama berkas:

Parameter yang didukung adalah:

* %B => nama berkas dan _path_ untuk berkas keluaran yang dipilih, tanpa _path_ dan ekstensi.

* %I => nama berkas lengkap dan _path_ dari berkas masukan sementara (berkas Netlist antara).

* %O => nama berkas lengkap dan _path_ untuk berkas keluaran yang dipilih.

_%I_ akan diganti dengan nama berkas antara yang sesungguhnya.

_%O_ akan diganti dengan nama berkas keluaran yang sesungguhnya.

[[command-line-format-example-for-xsltproc]]
===== Format Baris Perintah: Contoh xsltproc

Format baris perintah untuk xsltproc adalah sebagai berikut:

<path ke xsltproc> xsltproc <parameter xsltproc>

Penggunaan di Windows:

*f:/kicad/bin/xsltproc.exe -o "%O" f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"*

Penggunaan di Linux:

*xsltproc -o "%O" /usr/local/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"*

Contoh di atas mengasumsikan xsltproc terinstal pada komputer Windows dan semua berkas berada di direktori `kicad/bin`.

[[bill-of-materials-generation]]
==== Pembuatan _Bill of Materials_

Karena berkas Netlist antara berisi semua informasi mengenai komponen-komponen yang digunakan, maka kita bisa membuat BOM berdasarkan berkas tersebut. Berikut adalah tampilan jendela pengaturan _plugin_ (di Linux) untuk membuat berkas _Bill of Materials_ (BOM) kustom:

image::images/en/bom-netlist-tab.png[alt="bom-netlist-tab_png", scaledwidth="80%"]

_Path_ menuju berkas _stylesheet_ `bom2csv.xsl` tergantung pada sistem yang kita gunakan. _Stylesheet_ XSLT terbaik yang ada saat ini untuk pembuatan BOM adalah __bom2csv.xsl__. Anda bebas melakukan modifikasi sesuai kebutuhan, dan jika Anda merasa hasil modifikasi tersebut akan bermanfaat untuk orang lain, Anda bisa memasukkan hasil modifikasi tersebut sebagai bagian dari proyek KiCad.

[[command-line-format-example-for-python-scripts]]
=== Format Baris Perintah: Contoh Skrip Python

Format baris perintah untuk Python adalah sebagai berikut:

python <nama berkas skrip> <nama berkas masukan> <nama berkas keluaran>

Penggunaan di Windows:

*python *.exe f:/kicad/python/my_python_script.py "%I" "%O"*

Penggunaan di Linux:

*python /usr/local/kicad/python/my_python_script.py "%I" "%O"*

Dengan asumsi Python telah terinstal di komputer Anda.

[[intermediate-netlist-structure]]
=== Struktur Netlist Antara

Contoh berikut ini menunjukkan format berkas Netlist.

---------------------------------------------------------------
<?xml version="1.0" encoding="utf-8"?>
<export version="D">
  <design>
    <source>F:\kicad_aux\netlist_test\netlist_test.sch</source>
    <date>29/08/2010 21:07:51</date>
    <tool>eeschema (2010-08-28 BZR 2458)-unstable</tool>
  </design>
  <components>
    <comp ref="P1">
      <value>CONN_4</value>
      <libsource lib="conn" part="CONN_4"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2141</tstamp>
    </comp>
    <comp ref="U2">
      <value>74LS74</value>
      <libsource lib="74xx" part="74LS74"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20BA</tstamp>
    </comp>
    <comp ref="U1">
      <value>74LS04</value>
      <libsource lib="74xx" part="74LS04"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20A6</tstamp>
    </comp>
    <comp ref="C1">
      <value>CP</value>
      <libsource lib="device" part="CP"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2094</tstamp>
    <comp ref="R1">
      <value>R</value>
      <libsource lib="device" part="R"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E208A</tstamp>
    </comp>
  </components>
  <libparts/>
  <libraries/>
  <nets>
    <net code="1" name="GND">
      <node ref="U1" pin="7"/>
      <node ref="C1" pin="2"/>
      <node ref="U2" pin="7"/>
      <node ref="P1" pin="4"/>
    </net>
    <net code="2" name="VCC">
      <node ref="R1" pin="1"/>
      <node ref="U1" pin="14"/>
      <node ref="U2" pin="4"/>
      <node ref="U2" pin="1"/>
      <node ref="U2" pin="14"/>
      <node ref="P1" pin="1"/>
    </net>
    <net code="3" name="">
      <node ref="U2" pin="6"/>
    </net>
    <net code="4" name="">
      <node ref="U1" pin="2"/>
      <node ref="U2" pin="3"/>
    </net>
    <net code="5" name="/SIG_OUT">
      <node ref="P1" pin="2"/>
      <node ref="U2" pin="5"/>
      <node ref="U2" pin="2"/>
    </net>
    <net code="6" name="/CLOCK_IN">
      <node ref="R1" pin="2"/>
      <node ref="C1" pin="1"/>
      <node ref="U1" pin="1"/>
      <node ref="P1" pin="3"/>
    </net>
  </nets>
</export>
---------------------------------------------------------------

[[general-netlist-file-structure]]
==== Struktur Berkas Netlist Umum

Berkas Netlist antara terdiri dari lima bagian.

* Bagian _header_.
* Bagian komponen.
* Bagian _lib parts_.
* Bagian pustaka.
* Bagian _net_.

Isi berkas ini memiliki pembatas <export>

--------------------
<export version="D">
...
</export>
--------------------

[[the-header-section]]
==== Bagian _Header_

Bagian _header_ memiliki pembatas <design>

-----------------------------------------------------------
<design>
<source>F:\kicad_aux\netlist_test\netlist_test.sch</source>
<date>21/08/2010 08:12:08</date>
<tool>eeschema (2010-08-09 BZR 2439)-unstable</tool>
</design>
-----------------------------------------------------------

Bagian ini bisa dianggap sebagai bagian komentar.

[[the-components-section]]
==== Bagian Komponen

Bagian komponen memiliki pembatas <components>

-------------------------------------
<components>
<comp ref="P1">
<value>CONN_4</value>
<libsource lib="conn" part="CONN_4"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>4C6E2141</tstamp>
</comp>
</components>
-------------------------------------

Bagian ini berisi daftar komponen yang ada pada skematik Anda. Setiap komponen dijelaskan seperti ini:

-------------------------------------
<comp ref="P1">
<value>CONN_4</value>
<libsource lib="conn" part="CONN_4"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>4C6E2141</tstamp>
</comp>
-------------------------------------

[width="100%", cols="37%,63%"]
|=======================================================================
|*libsource* |name of the lib where this component was found.

|*part* |component name inside this library.

|*sheetpath* |path of the sheet inside the hierarchy: identify the sheet
within the full schematic hierarchy.

|*tstamps (time stamps)* |time stamp of the schematic file.

|*tstamp (time stamp)* |time stamp of the component.
|=======================================================================

[[note-about-time-stamps-for-components]]
===== Catatan Mengenai Tanda Waktu Komponen

Untuk mengidentifikasi sebuah komponen di dalam Netlist dan kemudian di papan sirkuit, digunakan referensi tanda waktu yang bersifat unik untuk setiap komponen. KiCad juga menyediakan cara lain untuk mengidentifikasi sebuah komponen dengan _footprint_ yang terkait di papan sirkuit. Dengan demikian, bisa dilakukan anotasi ulang komponen-komponen pada proyek skematik, dan tautan antara komponen dan _footprint_ akan tetap terjaga.

Tanda waktu menjadi pengidentifikasi yang bersifat unik untuk setiap komponen atau lembar kerja pada suatu proyek skematik. Namun di hirarki kompleks, satu lembar kerja yang sama bisa digunakan lebih dari satu kali, sehingga lembar kerja ini akan berisi komponen-komponen dengan tanda waktu yang sama.

Lembar kerja tersebut memiliki sebuah pengidentifikasi unik di hirarki kompleks: _path_ lembar kerja. Maka, komponen (di dalam hirarki kompleks) memiliki pengidentifikasi unik berupa: _path_ lembar kerja + tanda waktu.

[[the-libparts-section]]
==== Bagian _Libparts_

Bagian _libparts_ memiliki pembatas <libparts>, dan isi dari bagian ini didefinisikan di pustaka skematik. Bagian ini berisi:

* The allowed footprints names (names use wildcards) delimiter <fp>.
* Pembatas <fields>, atribut-atribut yang didefinisikan di dalam pustaka.
* Pembatas <pins>, daftar pin.

--------------------------------------------------
<libparts>
<libpart lib="device" part="CP">
  <description>Condensateur polarise</description>
  <footprints>
    <fp>CP*</fp>
    <fp>SM*</fp>
  </footprints>
  <fields>
    <field name="Reference">C</field>
    <field name="Valeur">CP</field>
  </fields>
  <pins>
    <pin num="1" name="1" type="passive"/>
    <pin num="2" name="2" type="passive"/>
  </pins>
</libpart>
</libparts>
--------------------------------------------------

Baris seperti <pin num="1" type="passive"/> juga menampilkan tipe pin elektrikal. Tipe pin elektrikal yang bisa digunakan antara lain:

[width="94%", cols="25%,75%"]
|================================================================
|Input |Pin masukan biasa
|Output |Pin keluaran biasa
|Bidirectional |Masukan atau keluaran
|Tri-state |_Bus_ masukan/keluaran
|Passive |Komponen pasif biasa
|Unspecified |Tipe elektrikal yang tidak diketahui
|Power input |Masukan _power_ suatu komponen
|Power output |Keluaran _power_, seperti keluaran regulator
|Open collector |_Open collector_ yang biasanya ada di komparator analog
|Open emitter |_Open emitter_ yang terkadang ada di logika
|Not connected |Harus dibiarkan terbuka di skematik
|================================================================

[[the-libraries-section]]
==== Bagian Pustaka

Bagian pustaka memiliki pembatas <libraries>. Bagian ini berisi daftar pustaka skematik yang digunakan pada proyek.

------------------------------------------------
<libraries>
  <library logical="device">
    <uri>F:\kicad\share\library\device.lib</uri>
  </library>
  <library logical="conn">
    <uri>F:\kicad\share\library\conn.lib</uri>
  </library>
</libraries>
------------------------------------------------

[[the-nets-section]]
==== Bagian _Net_

Bagian _net_ memiliki pembatas <nets>. Bagian ini berisi "konektivitas" skematik.

-----------------------------
<nets>
  <net code="1" name="GND">
    <node ref="U1" pin="7"/>
    <node ref="C1" pin="2"/>
    <node ref="U2" pin="7"/>
    <node ref="P1" pin="4"/>
  </net>
  <net code="2" name="VCC">
    <node ref="R1" pin="1"/>
    <node ref="U1" pin="14"/>
    <node ref="U2" pin="4"/>
    <node ref="U2" pin="1"/>
    <node ref="U2" pin="14"/>
    <node ref="P1" pin="1"/>
  </net>
</nets>
-----------------------------

Bagian ini menampilkan daftar semua _net_ pada skematik.

Sebuah _net_ bisa memiliki daftar seperti berikut ini.

--------------------------
<net code="1" name="GND">
  <node ref="U1" pin="7"/>
  <node ref="C1" pin="2"/>
  <node ref="U2" pin="7"/>
  <node ref="P1" pin="4"/>
</net>
--------------------------

[width="77%", cols="20%,80%"]
|================================================
|net code |Pengidentifikasi internal untuk _net_ ini
|name |Nama _net_
|node |Referensi pin yang terhubung ke _net_ ini
|================================================

[[more-about-xsltproc]]
=== Lebih Lanjut Tentang xsltproc

Silakan mengacu pada halaman: _http://xmlsoft.org/XSLT/xsltproc.html_

[[introduction-7]]
==== Pengenalan

xsltproc adalah sebuah alat baris perintah untuk menerapkan _stylesheet_ XSLT ke dokumen XML. Alat ini dkembangkan sebagai bagian dari proyek GNOME, namun dapat digunakan secara independen di luar desktop GNOME.

xsltproc dijalankan melalui baris perintah dengan nama _stylesheet_ yang akan digunakan diikuti dengan nama berkas yang mana _stylesheet_ akan diterapkan. Alat ini akan menggunakan masukan standar jika nama berkas yang diberikan berupa -.

Jika tersedia sebuah _stylesheet_ di dalam dokumen XML dengan 'Style-sheet Processing Instruction', kita tidak perlu lagi menyebutkan sebuah _stylesheet_ pada baris perintah. xsltproc akan secara otomatis mendeteksi _stylesheet_ yang tersedia dan menggunakannya. Secara _default_, keluaran dari perintah ini adalah ke __stdout__. Keluaran bisa disimpan ke sebuah berkas dengan menggunakan opsi -o.

[[synopsis]]
==== Sinopsis

---------------------------------------------------------------------------
xsltproc [[-V] | [-v] | [-o *file* ] | [--timing] | [--repeat] |
[--debug] | [--novalid] | [--noout] | [--maxdepth *val* ] | [--html] |
[--param *name* *value* ] | [--stringparam *name* *value* ] | [--nonet] |
[--path *paths* ] | [--load-trace] | [--catalogs] | [--xinclude] |
[--profile] | [--dumpextensions] | [--nowrite] | [--nomkdir] |
[--writesubtree] | [--nodtdattr]] [ *stylesheet* ] [ *file1* ] [ *file2* ]
[ *....* ]
---------------------------------------------------------------------------

[[command-line-options]]
==== Opsi-opsi Baris Perintah

_-V_ atau _--version_

Menampilkan versi libxml dan libxslt yang digunakan.

_-v_ atau _--verbose_

Menampilkan setiap langkah yang diambil oleh xsltproc dalam memproses _stylesheet_ dan dokumen.

_-o_ atau _--output file_

Mengarahkan keluaran ke berkas dengan nama __file__. Untuk keluaran lebih dari satu, juga dikenal sebagai "'chunking'", -o direktori/ akan mengarahkan berkas keluaran ke direktori yang ditentukan. Direktori tersebut harus sudah ada sebelumnya.

_--timing_

Menampilkan waktu yang digunakan untuk menguraikan _stylesheet_, menguraikan dokumen, dan menerapkan _stylesheet_ dan menyimpan hasilnya. Ditampilkan dalam satuan milidetik.

_--repeat_

Menjalankan transformasi sebanyak 20 kali. Digunakan untuk pengujian pewaktuan.

_--debug_

Menghasilkan sebuah pohon XML dari dokumen yang ditransformasikan, untuk keperluan _debugging_.

_--novalid_

Lewati memuat DTD dokumen.

_--noout_

Jangan mengeluarkan hasilnya.

_--maxdepth value_

Atur kedalaman maksimum dari tumpukan templat sebelum libxslt menyimpulkan bahwa ini adalah putaran tak terbatas. Nilai _default_ adalah 500.

_--html_

Dokumen masukan berupa berkas HTML.

_--param name value_

Memberikan parameter nama _name_ dan nilai _value_ ke _stylesheet_. Anda bisa memberikan beberapa pasang nama/nilai hingga jumlah maksimum 32. Jika nilai yang diberikan berupa 'string' dan bukan 'node identifier', gunakan --stringparam.

_--stringparam name value_

Memberikan parameter berupa nama _name_ dan nilai _value_ di mana _value_ adalah 'string' dan bukan 'node identifier'. (Catatan: 'string' harus utf-8.)

_--nonet_

Jangan menggunakan Internet untuk mengambil DTD, entitas atau dokumen.

_--path paths_

Menggunakan daftar (dipisahkan oleh spasi atau kolom) _path_ sistem berkas untuk memuat DTD entitas atau dokumen.

_--load-trace_

Menampilkan ke stderr semua dokumen yang dimuat selama pemrosesan.

_--catalogs_

Gunakan katalog SGML yang disebutkan di SGML_CATALOG_FILES untuk menyelesaikan lokasi entitas eksternal. Secara _default_, xsltproc akan melihat katalog yang disebutkan di XML_CATALOG_FILES. Jika tidak disebutkan di situ, maka digunakan /etc/xml/catalog.

_--xinclude_

Memproses dokumen masukan menggunakan spesifikasi Xinclude. Lebih lanjut mengenai hal ini bisa ditemukan pada spesifikasi Xinclude: http://www.w3.org/TR/xinclude/[http://www.w3.org/TR/xinclude/]

_--profile --norman_

Menghasilkan keluaran berupa informasi _profiling_ yang menjelaskan jumlah waktu yang dihabiskan dalam setiap bagian _stylesheet_. Hal ini berguna untuk mengoptimasi performa _stylesheet_.

_--dumpextensions_

Mengeluarkan daftar semua ekstensi terdaftar ke stdout.

_--nowrite_

Jangan menulis ke berkas atau sumber apapun.

_--nomkdir_

Jangan membuat direktori.

_--writesubtree path_

Diperbolehkan menulis berkas hanya di dalam _path_.

_--nodtdattr_

Jangan menerapkan atribut _default_ dari DTD dokumen.

[[xsltproc-return-values]]
==== Nilai Kembali Xsltproc

xsltproc akan mengembalikan sebuah nomor status yang akan berguna saat kita menjalankannya di dalam sebuah skrip.

0: normal

1: tidak ada argumen

2: terlalu banyak parameter

3: opsi tidak diketahui

4: gagal mengurai _stylesheet_

5: terdapat kesalahan pada _stylesheet_

6: terdapat kesalahan pada salah satu dokumen

7: metode xsl:output tidak didukung

8: parameter 'string' berisi tanda petik dan tanda petik ganda

9: kesalahan pemrosesan internal

10: pemrosesan terhenti oleh suatu pesan penghentian

13: tidak dapat menulis hasil ke berkas keluaran

[[more-information-about-xsltproc]]
==== Informasi Lebih Lanjut Tentang xsltproc

Halaman web libxml: http://www.xmlsoft.org/[http://www.xmlsoft.org/]

Halaman XSLT W3C: http://www.w3.org/TR/xslt[http://www.w3.org/TR/xslt]

:experimental:

[[simulator]]
== Simulator ==

KiCad provides an embedded electrical circuit simulator using http://ngspice.sourceforge.net[ngspice] as the simulation engine.

Ketika bekerja dengan simulator, Anda akan membutuhkan pustaka resmi _pspice_. Pustaka ini memiliki simbol-simbol umum yang digunakan untuk simulasi seperti sumber tegangan/arus atau transistor dengan pin yang penomorannya sesuai dengan spesifikasi urutan _node_ ngspice.

Disediakan pula beberapa proyek demo untuk menunjukkan kemampuan simulator. Anda bisa membukanya di direktori _demos/simulation_.

=== Menerapkan Model

Sebelum melakukan simulasi, kita harus menentukan model Spice untuk masing-masing komponen.

Setiap komponen hanya bisa mendapatkan satu model, meskipun komponen tersebut terdiri dari beberapa bagian. Dalam hal ini, model Spice diterapkan pada bagian yang pertama.

[[sim-passive-models]] Komponen-komponen pasif dengan referensi yang cocok dengan suatu tipe divais dalam notasi Spice (_R*_ untuk resistor, _C*_ untuk kapasitor, _L*_ untuk induktor) akan memiliki model yang diterapkan secara implisit dan menggunakan atribut nilai untuk menentukan propertinya.

[NOTE]
Ingat bahwa di Spice, penggunaan 'M' berarti milli dan 'Meg' berarti mega. Jika Anda lebih suka menggunakan 'M' untuk mengindikasikan mega, Anda bisa melakukan pengaturan di <<sim-settings, kotak dialog pengaturan simulasi>>.

Informasi model Spice disimpan sebagai teks pada atribut-atribut simbol. Anda bisa mendefinisikannya di _Symbol Editor_ atau di _Schematics Editor_. Buka kotak dialog _Symbol Properties_ dan klik pada tombol _Edit Spice Model_ untuk membuka dialog _Spice Model Editor_.

Kotak dialog 'Spice Model Editor' mempunyai tiga tab sesuai dengan tipe modelnya. Ada dua opsi umum untuk semua tipe model:

[width="90%", cols="30%a,70%a"]
|====
|Disable symbol for simulation
|When checked the component is excluded from simulation.
|Alternate node sequence
|Allows one to override symbol pin to model node mapping.
To define a different mapping, specify pin numbers in order expected by the model.

'Example:' +
____
`* connections:` +
`* 1: non-inverting input` +
`* 2: inverting input` +
`* 3: positive power supply` +
`* 4: negative power supply` +
`* 5: output` +
`.subckt tl071 1 2 3 4 5`
____

image::images/opamp_symbol.png[alt="Generic operational amplifier symbol"]

To match the symbol pins to the Spice model nodes shown above, one needs to use an alternate node sequence option with value: "1{nbsp}3{nbsp}5{nbsp}2{nbsp}4". It is a list of pin numbers corresponding to the Spice model nodes order.
|====

==== Tab _Passive_

Di tab _Passive_, kita bisa menerapkan sebuah model divais pasif (resistor, kapasitor, atau induktor) ke suatu komponen. Namun hal ini jarang digunakan, karena umumnya komponen pasif telah memiliki model yang diterapkan <<sim-passive-models,secara implisit>>, kecuali jika referensi komponen tidak cocok dengan tipe divais aktual.

[NOTE]
Model divais pasif yang ditetapkan secara eksplisit memiliki prioritas lebih tinggi daripada model divais yang ditetapkan secara implisit. Artinya, setelah model divais pasif telah ditetapkan, atribut referensi dan nilai akan diabaikan selama simulasi. Hal ini mungkin akan membingungkan ketika nilai model yang ditetapkan tidak sesuai dengan nilai yang ditampilkan pada lembar kerja skematik.

image::images/sim_model_passive.png[alt="Passive device model editor tab"]

[width="90%", cols="30%a,70%a"]
|====
|Type
|Memilih tipe divais (resistor, kapasitor, atau induktor).
|Value
|Menentukan properti divais (resistansi, kapasitansi, atau induktansi). Nilainya
bisa menggunakan prefiks satuan Spice (seperti ditampilkan di bawah kotak masukan teks) dan
harus menggunakan titik sebagai pemisah desimal. Ingat bahwa Spice tidak bisa menginterpretasikan secara tepat
prefiks yang disilangkan dengan nilai (misalnya 1k5).
|====

==== Tab _Model_

Tab _Model_ digunakan untuk menetapkan suatu semikonduktor atau model kompleks yang didefinisikan pada sebuah berkas pustaka eksternal. Pustaka model Spice terkadang disediakan oleh manufaktur.

Kotak teks utama menampilkan isi berkas pustaka yang dipilih. Sudah menjadi praktik yang umum untuk memasukkan penjelasan model ke dalam berkas pustaka, termasuk urutan _node_.

image::images/sim_model_subckt.png[alt="Semiconductor device model editor tab"]

[width="90%", cols="30%a,70%a"]
|====================
|File
|_Path_ menuju ke berkas pustaka Spice. Berkas ini akan digunakan oleh
simulator, dan ditambahkan dengan direktif _.include_.
|Model
|Model divais yang dipilih. Ketika ada sebuah berkas yang dipilih, daftar ini akan diisi dengan model yang tersedia untuk dipilih.
|Type
|Pilihan tipe model (subsirkuit, BJT, MOSFET atau dioda).
Normalnya, pilihan ini ditentukan secara otomatis ketika sebuah model dipilih.
|====================

==== Tab _Source_

Tab _Source_ digunakan untuk menetapkan model sumber sinyal atau _power_. Ada dua bagian: _DC/AC analysis_ dan _Transient analysis_. Masing-masing mendefinisikan parameter sumber untuk tipe simulasi yang terkait.

Opsi _Source type_ diaplikasikan untuk semua tipe simulasi.

image::images/sim_model_source.png[alt="Source model editor tab"]

Silakan mengacu ke http://ngspice.sourceforge.net/docs/ngspice-27-manual.pdf[dokumentasi ngspice], Bab 4 (_Voltage and Current Sources_) untuk informasi lebih lanjut.

[[sim-directives]]
=== Direktif Spice

It is possible to add Spice directives by placing them in text fields on a schematic sheet. This approach is convenient for defining the default simulation type. This functionality is limited to Spice directives starting with a dot (e.g. `.tran 10n 1m`), it is not possible to place additional components using text fields.

=== Simulasi

Untuk menjalankan simulasi, buka kotak dialog _Spice Simulator_ dengan memilih menu _Tools -> Simulator_ pada jendela editor skematik.

image::images/sim_main_dialog.png[alt="Main simulation dialog"]

Kotak dialog ini dibagi menjadi beberapa bagian:

* <<sim-toolbar,Bilah alat>>
* <<sim-plot-panel,Panel _Plot_>>
* <<sim-output-console,Konsol keluaran>>
* <<sim-signals-list,Daftar sinyal>>
* <<sim-cursors-list,Daftar kursor>>
* <<sim-tune-panel,Panel _Tune_>>

==== Menu

[[sim-menu-file]]
===== Menu _File_
[width="90%", cols="30%,70%"]
|====
|New Plot | Membuat tab baru pada panel _plot_.
|Open Workbook | Membuka daftar sinyal yang di-plot.
|Save Workbook | Menyimpan daftar sinyal yang di-plot.
|Save as image | Mengekspor _plot_ yang aktif ke berkas `.png`.
|Save as .csv file | Mengekspor data mentah titik-titik _plot_ ke berkas `.csv`.
|Exit Simulation | Menutup kotak dialog.
|====

[[sim-menu-simulation]]
===== Simulasi
[width="90%", cols="30%,70%"]
|====
|Run Simulation | Menjalankan simulasi menggunakan pengaturan saat ini.
|Add signals... | Membuka kotak dialog untuk memilih sinyal yang akan diplot.
|Probe from schematics | Menjalankan alat <<sim-probe-tool,Probe>> skematik.
|Tune component value | Menjalankan alat <<sim-tuner-tool,Tuner>>.
|Show SPICE Netlist... | Membuka kotak dialog yang menampilkan Netlist yang
telah dibuat untuk sirkuit yang disimulasikan.
|Settings... | Membuka <<sim-settings,kotak dialog pengaturan simulasi>>.
|====

[[sim-menu-view]]
===== Menu _View_
[width="90%", cols="30%,70%"]
|====
|Zoom In | Perbesar tampilan pada _plot_ yang aktif.
|Zoom Out | Perkecil tampilan pada plot yang aktif.
|Fit on Screen | Mengatur tampilan untuk menampilkan semua _plot_.
|Show grid | Tampilkan/sembunyikan grid.
|Show legend | Tampilkan/sembunyikan legenda _plot_.
|====

[[sim-toolbar]]
==== Bilah Alat
image::images/sim_main_toolbar.png[alt="Simulation dialog top toolbar"]
Bilah alat bagian atas digunakan untuk mengakses perintah-perintah yang sering dijalankan.

[width="90%", cols="30%,70%"]
|====
|Run/Stop Simulation | Jalankan atau hentikan simulasi.
|Add Signals | Membuka kotak dialog untuk memilih sinyal yang akan di-plot.
|Probe | Menjalankan alat <<sim-probe-tool,Probe>> skematik.
|Tune | Menjalankan alat <<sim-tuner-tool,Tuner>>.
|Settings | Membuka <<sim-settings,kotak dialog pengaturan simulasi>>.
|====

[[sim-plot-panel]]
==== Panel _Plot_
Memvisualisasikan hasil simulasi dalam bentuk _plot_. Kita bisa membuka beberapa _plot_ pada tab yang berbeda, namun ketika simulasi dijalankan, hanya tab yang aktif saja yang akan diperbarui. Dengan demikian dimungkinkan untuk membandingkan hasil simulasi dengan parameter yang berbeda.

_Plot_ dapat diatur dengan menampilkan/menyembunyikan grid dan legenda menggunakan menu <<sim-menu-view,View>>. Ketika legenda ditampilkan, kita bisa menggeser untuk mengubah posisinya.

Interaksi panel _plot_:

* Putar roda tetikus untuk memperbesar/memperkecil tampilan.
* Klik-kanan untuk membuka menu konteks untuk mengatur tampilan.
* Gambar sebuah kotak pemilih untuk memperbesar area yang dipilih.
* Geser kursor untuk mengubah koordinatnya.

[[sim-output-console]]
==== Konsol Keluaran
Konsol keluaran menampilkan pesan-pesan dari simulator. Kita perlu memeriksa konsol untuk memastikan tidak ada pesan kesalahan dan peringatan.

[[sim-signals-list]]
==== Daftar Sinyal
Menampilkan daftar sinyal yang ditampilkan pada _plot_ yang aktif.

Interaksi daftar sinyal:

* Klik-kanan untuk membuka menu konteks untuk menyembunyikan sinyal atau mengubah kursor.
* Klik-ganda untuk menyembunyikan sinyal.

[[sim-cursors-list]]
==== Daftar Kursor
Menampilkan daftar kursor dan koordinatnya. Setiap sinyal bisa memiliki satu kursor yang ditampilkan. Konfigurasi visibilitas kursor diatur menggunakan daftar <<sim-signals-list,Signals>>.

[[sim-tune-panel]]
==== Panel _Tune_
Menampilkan komponen-komponen yang diambil menggunakan alat <<sim-tuner-tool,Tuner>>. Panel ini digunakan untuk memodifikasi nilai komponen secara cepat dan mengamati pengaruhnya pada hasil simulasi - setiap kali nilai sebuah komponen diubah, simulasi akan dijalankan ulang dan _plot_ akan diperbarui.

Untuk setiap komponen, ada beberapa kendali yang terkait:

* Atribut teks _top_ mengatur nilai maksimum komponen.
* Atribut teks _middle_ mengatur nilai aktual komponen.
* Atribut teks _bottom_ mengatur nilai minimum komponen.
* _Slider_ digunakan untuk mengubah nilai komponen secara halus.
* Tombol _Save_ memodifikasi nilai komponen pada skematik ke nilai yang dipilih dengan menggunakan _slider_.
* Tombol _X_ menghapus komponen dari panel _Tune_ dan mengembalikan ke nilai aslinya.

Ketiga atribut teks di atas mengenali prefiks satuan Spice.

[[sim-tuner-tool]]
==== Alat _Tuner_
Alat _Tuner_ digunakan untuk memilih komponen untuk keperluan _tuning_.

Untuk memilih komponen untuk _tuning_, klik pada satu komponen di editor skematik ketika alat ini aktif. Komponen yang dipilih akan muncul di panel <<sim-tune-panel,Tune>>. Kita hanya bisa melakukan _tuning_ komponen pasif.

[[sim-probe-tool]]
==== Alat _Probe_
Alat _Probe_ digunakan untuk memilih sinyal untuk dilakukan _plotting_.

Untuk menambahkan sinyal yang akan diplot, klik pada _wire_ yang diinginkan di editor skematik ketika alat ini aktif.

[[sim-settings]]
==== Pengaturan Simulasi

image::images/sim_settings.png[alt="Simulation settings dialog"]

Kotak dialog pengaturan simulasi digunakan untuk mengatur tipe dan parameter-parameter simulasi. Ada empat tab pada kotak dialog ini:

* Tab _AC_
* Tab _DC Transfer_
* Tab _Transient_
* Tab _Custom_

Tiga tab pertama digunakan untuk memasukan parameter-parameter simulasi. Tab yang terakhir digunakan untuk menuliskan direktif kustom Spice untuk membuat sebuah simulasi. Untuk informasi lebih lanjut mengenai tipe dan parameter-parameter simulasi, lihat http://ngspice.sourceforge.net/docs/ngspice-27-manual.pdf[dokumentasi ngspice], Bab 1.2.

Cara lain untuk mengkonfigurasi sebuah simulasi adalah dengan menuliskan <<sim-directives,direktif Spice>> ke atribut teks pada skematik. Setiap direktif atribut teks yang berhubungan dengan tipe simulasi akan ditimpa dengan pengaturan yang dipilih pada kotak dialog. Hal ini berarti bahwa setelah Anda menggunakan kotak dialog simulasi, kotak dialog akan menimpa direktif-direktif skematik hingga simulator dibuka kembali.

Ada dua opsi yang umum untuk semua tipe simulasi:
[width="90%", cols="30%,70%"]
|====
|Adjust passive symbol values | Mengganti nilai simbol pasif untuk mengkonversi notasi
nilai komponen umum ke notasi Spice.
|Add full path for .include library directives | Menambahkan nama berkas pustaka
model Spice dengan _path_ lengkap. Normalnya, ngspice memerlukan _path_ lengkap
untuk mengakses sebuah berkas pustaka.
|====