Chapter X: SIMULATION

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Simulator Operation

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To begin simulation of the circuit in the current window, use the Simulate... subcommand of the Simulation command of the Tools menu. The simulator already knows about CMOS transistors and many digital logic gates. In addition, the user can describe any function with the hardware description language described later in this chapter.

When simulation begins, a waveform appears in a new window or window partition and the window is highlighted with a red border. The circuit that is being simulated is also highlighted with a red border to indicate its association.

Figure 10.1

All exported ports in the circuit are listed on the left. Two vertical cursors appear in the window, called "main" and "extension". You can click over the cursors and drag them to different time locations. You can also click over signal names to select them for appropriate operations. Note that when you click on a signal name, the equivalent signal in any other relevant hwindow is also highlighted.

Once a signal name has been selected, a test vector can be placed on that signal at the time specified by the main cursor. Type "l", "h" or "x" to set the signal to low, high, or undefined (using normal strength, shown in magenta). Prefix the letter with a "w" ("wl", "wh", and "wx") to set a weaker strength signal (shown in green). Prefix the letter with an "s" ("sl", "sh", and "sx") for stronger strength signals (shown in black).

Figure 10.2
Besides simple test vectors, clock patterns can be set on the currently selected signal by typing the letter "c". The user is then given a dialog for clock specification. There are three ways to specify a clock: by frequency, period, or with custom phases. If the frequency or period method is selected, the only option is the frequency (in cycles per second) or period (in seconds). If, however, custom clock specifications are requested, the entire lower part of the dialog is enabled (as show on the left) and many options are available. You can choose the strength of the clock (node, gate, or VDD), the random distribution of the clock, and a list of phases that will be repeated a specified number of times (use 0 repetitions for an infinite clock). For each phase, select its level (low, high, or undefined) and its duration. Then use the "Add Phase" button to add it to the list. Use the "Delete Phase" button to remove a phase.

To remove the test vectors on the selected signal, type the "e" key. Use the Clear All Vectors subcommand of the Simulation command of the Tools menu to erase all test vectors.

Once vectors are established, the Save Vectors to Disk subcommand of the Simulation command of the Tools menu will write this information to disk. Use the Restore Vectors from Disk subcommand to read it back. Another way to obtain simulation data is to read an SDF file (with the SDF subcommand of the Import command of the File menu). Once this data has been read, one of three sets of values (Typical, Minimum, or Maximum) must be selected from the Annotate Delay Data subcommand of the Simulate command of the Tools menu.

Besides test vector commands, you can control the simulation window. Use "r" to remove the selected signal from the display. Use "a" to add a signal back onto the display. Use Restore Signal Display Order to reset the waveform display to its original set of signals.

The time axis of the simulation window can be controlled with the appropriate Window menu commands. Use Zoom Out and Zoom In to scale the time axis by a factor of two. Use Focus on Highlighted to display the range between the main and extension cursors. Use Right and Left to shift the time axis forward and backward.

Some miscellaneous commands are also available. Use "i" to display information about the selected network. Use "s" to save a snapshot of the simulation window in the database (a facet is created with artwork components).

The simulator uses the hierarchy in the original circuit during simulation. Therefore, the signals shown are those from the current hierarchical level. To see a lower level of hierarchy, use the Down Hierarchy... subcommand of the Simulation command of the Tools menu, and select the instance in which to descend. To see the next higher level, use the Up Hierarchy subcommand. If there are more signals at a given level than can fit in the window, use the Up and Down commands of the Window menu to scroll through the signal names.

Each change that is made to the simulator causes it to resimulate and display the results. If multiple changes are to be made and the simulation time is long, uncheck the Resimulate Each Change subcommand of the Simulation command of the Tools menu. Then, the simulator will not redraw after each change.

To stop simulation, close the simulation window. You can get the simulation window back with the Resume Simulation subcommand of the Simulation command of the Tools menu.

Here is a summary of the single-key commands available in digital simulation windows:

lSet selected signal low at main cursor (gate strength)
wlSet selected signal low at main cursor (node strength, weak)
slSet selected signal low at main cursor (VDD/GND strength, strong)
  
hSet selected signal high at main cursor (gate strength)
whSet selected signal high at main cursor (node strength, weak)
shSet selected signal high at main cursor (VDD/GND strength, strong)
  
xSet selected signal undefined at main cursor (gate strength)
wxSet selected signal undefined at main cursor (node strength, weak)
sxSet selected signal undefined at main cursor (VDD/GND strength, strong)
  
cSpecify a clock on selected signal
eDelete all vectors on selected signal
iPrint information about selected signal
  
aAdd signal to simulation window
rRemove selected signal from simulation window
sSave snapshot of simulation window in database
?Print this help message

These window menu functions apply to the digital simulation windows:


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